Some controller limit what each slot can operate at, so it's possible that the wider slots in your motherboard can't operate at a x1. To test if this is true, you can try putting another x1 card and see if it works on that slot.
If your development board actually has a wider PCIe interface (but you only operate at x1), then you may try taping off the lanes as shown in AR 38988 (http://www.xilinx.com/support/answers/38988.htm). It has been noticed that some PCIe host (Root Port) have trouble when it sees the unused GT and may interfere with link training.
Have you tried programming the board first and then start the PC or do some warm reboot (restart the PC)? Will that give you a different result?