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so-lli1
Adventurer
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Registered: ‎11-26-2016

MCAP PCI Express Extended Capability Registers - non-static information

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Hi,

 

The UltraScale Devices Gen3 Integrated Block for PCI, which I use in Tandem PCIe Configuration, offers MCAP PCI Express Extended Capability Registers. It is possible to transfer static information from the bitstream to the host, like MCAP VSEC ID, MCAP VSEC Rev ID or MCAP Bitstream Version using parameters.

 

However, in addition to this I would like to transfer non-static information to the host. More concrete, the hardware has a identification encoded in a few bits which don't change, but are unknown before configuration.

 

Is this possible in Stage 1 using the Extended Capability Registers?

 

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so-lli1
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Registered: ‎11-26-2016

I figured out that it is possible to do what I want using the Subsystem Vendor ID using the cfg_subsys_vend_id vector of the PCIe core.

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venkata
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Registered: ‎02-16-2010
Have you referred to AR#64761 (https://www.xilinx.com/support/answers/64761.html)?

I find the following from the document shared with this AR. Please check if it suits your requirement.

Users requiring their own Device ID and Vendor ID must add the same to mcap.inf present in the Driver’s installation location. The default installation location is C:\Program Files (x86)\Xilinx\mcap\mcap64\
1. Open the mcap.inf file
2. Check if the required VID & PID Combination is present in the mcap.inf file.
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so-lli1
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Registered: ‎11-26-2016

Hello @venkata

 

yes, I was referring to AR64761 regarding the Stage 1/2 Bitstream an the configuration process. However, I am aware that there is a PID, VID that can be set. This (including Stage 2 configuration from the Host) works all fine.


What I actually want is a register that replicates the states of IO-Pins of the FPGA to the PCIe Extended Capabilities Register or any other Register that can be accessed by the Host during Stage 1. Is it possible?

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so-lli1
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Registered: ‎11-26-2016

I figured out that it is possible to do what I want using the Subsystem Vendor ID using the cfg_subsys_vend_id vector of the PCIe core.

View solution in original post