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Visitor surajkumar
Visitor
7,887 Views
Registered: ‎08-15-2010

Memory Write TLPs fails

I need to pass a 32-bit data word from within the FPGA(virtex-5) to the PC memory via PCI Express. I implemented the Memory Write TLP logic and present it to the PCIe Core and let the Core transfer it to the PC application. I am presenting the data to the PCIe Endpoint core by taking care of trn_tdst_rdy_n and trn_tbuf_av signal. Every PCIe write TLP is of fixed length(2 DWs). I am facing issue of missing PCIe Memory write. I.e.. Not all my PCIe write data reaches the PC. Do I need to take some other signals in the PCIe endpoint signals to avoid the PCIe write failures?

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Visitor liy_dup
Visitor
7,874 Views
Registered: ‎10-31-2012

Re: Memory Write TLPs fails

Check whether there is malformed TLPs

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