I was wondering if it is possible to instantiate two PCIE DMA IPs, one configured as memory mapped and other as stream in a single design.
I am trying to configure few parameters using the AXI-LITE interface (which is inherently memory mapped) and want to send out data using AXI-STREAM interface on the VCU118 board. Can this be achieved in a single PCIE DMA IP instance?
If you are referring to the XDMA IP, then unless I am misunderstanding your requirements, you merely need to:
(i) Enable the m_axil interface (by enabling the Lite BAR)
(ii) Select AXI Stream for the the DMA engine interfaces
You do not need two XDMA IP instances for that. The host CPU will be able to read and write registers via the m_axil interface and bulk data transfer will be performed by DMA engines via the AXI Stream interfaces.