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Anonymous
Not applicable
4,637 Views

PCI solution: 8 atom chip need to communicate with 8 sata disk

Hi,

I am planning to attach 8 Intel atom chip to 8 sata disk via PCI. So plan is to connect 8 atom chips to FPGA via PCIe gen 2  and then implement some kind of switch in FPGA and then connect fpga to 8 SATA Disk. Could any one let me which FPGA can support   8 root port ( lane 1(x1) gen2 PCIe) per FPGA and 8 sata port per FPGA. If not then is there any alternative to do this vis connecting 4 FPGA and how to connect them and ucomplish the goal.

 

I read the datasheet of virtex-6 FPGA they  support only 4 PCIe blocks with 48 transreciever.  So i haev enough transrecever but cant use more then 4 PCIe IP core in that FPGA.  is this true or am i interpretting in a wrong way?

 

I need only PCIe root port here in the FPGA . Am i correct here?

 

I am planning to use PCI because thus the cheapest method in case we need to move to the production. The plan is to aggregate the storage for  ATOM server. So that 8 ATOM can directly share the 8 SATA disk over PCI.

 

Any kind of help from any member is much appreciated.

 

 

 

 

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3 Replies
luisb
Xilinx Employee
Xilinx Employee
4,621 Views
Registered: ‎04-06-2010

Each Root Port will need to use one PCIe block.  There is currently no way to use one PCIe block for multiple Root Ports or Endpoints.  So you are correct that you're going to be short on PCIe blocks since no device has 8 PCIe blocks.

 

Page 2 of the PCI Express data sheet shows you how many PCIe blocks are in each device:

http://www.xilinx.com/support/documentation/data_sheets/ds150.pdf

 

Hope this helps...

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Anonymous
Not applicable
4,593 Views

Hi Thanks for the reply. But i guess i can work with endpoints only.

 

I have a question some vendor provide IP for the sata controller for virtex-6.  So oncei get one of these IP i need to create a bridge between SATA controler IP and PCIe. Does anyone have experience how hard is this ?

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m006
Voyager
Voyager
4,463 Views
Registered: ‎03-18-2008

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