cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
arunkumarka
Observer
Observer
659 Views
Registered: ‎06-23-2011

PCIE more DW0

Dear all,

            i am using the Xilinx PCIE example code in AC701 board.The code is for one Double Word(DW) transmission.I am planning to increase the throughput ,so can i modify the same code(PIO_TX_engine.vhd)  to transmit more Double word in one transmission.If possible can anyone suggest the modifications to do support more DW request from Processors.

 

Regards

Arun

Tags (1)
0 Kudos
1 Reply
bethe
Xilinx Employee
Xilinx Employee
566 Views
Registered: ‎12-10-2013

Hi @arunkumarka,

 

The more recent devices (Ultrascale, Ultrascale+) benches include code for 2 DW.  You could reference those benches for a reference, noting that the user interfaces are different in these devices.

 

 

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------