PCIe-Artix 7 Simulation problem - EP MEM not getting data from packets

[avinashc]

Hello,

system- Artix7 Xc7a100t, ISE 14.7, Win10-64 bit

I am using example design of PCIe core and running the simulation.

pcie_rx and pcie_tx diffrential pair get the data but in Endpoint mem BAR I am not receiving any data.

So my question is:

1) How many packets are sending by pkt generation file.

2) Is there any requirement of min DWORD to be sent to mem by pkt generations?

3) why my EP MEM is not getting the data?

Thanks!

Avinash

[liy]

There are several branch for the simulation example. 

you can find more info in the sample_test.vh file. If the test only includes the config access then there is no transaction on the BARs

you could try to run the below test to verify the memory access

testname == "pio_writeReadBack_test0"

[avinashc · Accepted solution]

Hello,

It is working now.

Actually even after user_lnk goes high it takes 50-80us extra time to get data on simulation , I was not going till that time earlier. 

Thank You!