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Registered: ‎02-19-2018

PCIe DMA driver: I/O error when reading/writing certain addresses

I have a simple design using the XDMA IP and am able to run the tests provided by the driver in AR65444. I am working on integrating the driver into our application, but I've noticed that when attempting to read or write certain addresses of the device, I get a "Input/output error" when I call read().



- I have my DDR4 on the board mapped to the address range 0x00000000 to 0x3FFFFFFF.

- I have an AXI Traffic Generator block feeding data into the DDR


My application reads a 128 byte block of data from the device using the read() function and then increments the address by 128 and repeats. This works fine for a while but for some reason when I try to read from any address higher than 0x0007F800 I get an error from read() (it returns -1). I am not sure what's special about this particular address or why it's failing to read. It also does not give me much more information other than returning -1 as the error code and setting errno to "Input/output error".


My code uses the exact some code given in dma_utils.c for reading and writing to the device. So on each subsequent read I am essentially increasing the offset by 128 bytes (0x80). Is there a limit on the offset or the address?


It's also worth noting that I can successfully read from other (much higher addresses). For example, the following command works without error:

./dma_from_device -d /dev/xdma0_c2h_0 -s 128 -a 0x76100000 -c 1


but this one gives me the same "Input/output error":

./dma_from_device -d /dev/xdma0_c2h_0 -s 128 -a 0x80000000 -c 1


Note that those two commands above are not my own application, but the example code provided by Xilinx.


Can anyone tell me what is going on here? Why do some addresses produce errors while others do not?


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Xilinx Employee
Xilinx Employee
Registered: ‎08-06-2008



Could you please run the same test on Vivado 2018.2 and let us know if you still see the issue or not?

If you still see the issue, please post your xci file.



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