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kapsy_27
Adventurer
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Registered: ‎07-04-2013

PCIe Device ID

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Hi,

I have nine spartan6 FPGAs each having PCIe endpoint block connected to a PCIe switch on the board. My quesion is do I have to give different Device ID and Vendor ID to each of the PCIe endpoint block while customizing them or same Device ID and Vendor ID will work for all the nine devices.

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markcurry
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Registered: ‎09-16-2009

 

I agree with hgleamon1 - the vendor Id, and device id are just parameters at the top of the pcie_wrapper.

 

I've changed the device_id parameter by hand in a kintex7 device.  Be suprised if it was different for Spartan 6. 

 

To the OP - go in and edit the top level wrapper that the Xilinx tools generate.  Expose the following two parameters to your code:

CFG_DEV_ID, CFG_VEND_ID.

 

Overwrite the parameter as needed.

 

I'd bet it'll work fine.  Give it a shot, and let us know.

 

Regards,

 

Mark

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hgleamon1
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Registered: ‎11-14-2011

Largely it doesn't matter and therefore it's up to you (or, possibly, up to the system software designer).

 

The Device and Vendor IDs are really used for information in the system and, at a basic level, for fault diagnosis to check that the device on e.g. Bus 2 device 0 is, in fact, what you think it is (your correctly configured FPGA).

 

Personally, I like to use the Xilinx Vendor ID (0x10EE) and Device ID is a combination of the FPGA family and the PCIe Gen/Link width. If your company is a member of the PCI-SIG then you may have your own company ID that you can use (although I use ours for the Subsystem ID).

 

You can use the same or make them all different. The system doesn't really care about it other than maybe your host software wants to know what it is actually communicating with (and report a fault if it doesn't match some predetermined value).

  

----------
"That which we must learn to do, we learn by doing." - Aristotle
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balkris
Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008
check this ARs
http://www.xilinx.com/support/answers/40309.html

No, the user cannot program their own Vendor ID. The vendor ID is hard wired to Xilinx Vendor ID.
It cannot be changed. Instead, the assembly identifier can be changed to uniquely identify the device.
Thanks and Regards
Balkrishan
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hgleamon1
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Registered: ‎11-14-2011

@balkris wrote:
check this ARs
http://www.xilinx.com/support/answers/40309.html

No, the user cannot program their own Vendor ID. The vendor ID is hard wired to Xilinx Vendor ID.
It cannot be changed. Instead, the assembly identifier can be changed to uniquely identify the device.

That does not match my experience of the PCIe-AXI bridge component for the S6, where both the Vendor and Device ID are configurable by the user.

 

The OP didn't state which IP they were using (i.e. a bridge component that uses the Endpoint or just the Endpoint itself) nor what version of the tools they were using.

 

The AR just refers to changing the attributes after synthesis without regeneration, not about the apllication of the attributes themselves.

 

----------
"That which we must learn to do, we learn by doing." - Aristotle
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markcurry
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25,611 Views
Registered: ‎09-16-2009

 

I agree with hgleamon1 - the vendor Id, and device id are just parameters at the top of the pcie_wrapper.

 

I've changed the device_id parameter by hand in a kintex7 device.  Be suprised if it was different for Spartan 6. 

 

To the OP - go in and edit the top level wrapper that the Xilinx tools generate.  Expose the following two parameters to your code:

CFG_DEV_ID, CFG_VEND_ID.

 

Overwrite the parameter as needed.

 

I'd bet it'll work fine.  Give it a shot, and let us know.

 

Regards,

 

Mark

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kapsy_27
Adventurer
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Registered: ‎07-04-2013

Thanks markcurry and hgleamon1,

 

In the hdl file generated by the core we can modify the Device ID and Vendor ID manually. The file file has a comment which states:

  -- These values may be brought out and driven dynamically
  -- from pins rather than attributes if desired. Note -
  -- if they are not statically driven, the values must be
  -- stable before sys_reset_n is released

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