03-18-2020 02:56 AM
I want to design a simple block design consisting of microblaze processor, ethernet and pcie. Where should I connect the reference clock (refclk) of the AXI Memory mapped to PCIe in my block design? I believe this clock should come from the root complex?
Please help as early as possible!
03-18-2020 08:20 PM
the reference clock is from an exteral pin which connected to the system clock. It usually comes from the host
you will need to have a IBUFDS to connect to between the pin and the Memory map PCIE.An easiler way is to run the system automation