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jdabbs003
Observer
Observer
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Registered: ‎10-05-2016

PCIe Sanity Check

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I'm proposing a solution where we use an Artix-7 (nominally, xc7a100) to create a PCIe peripheral.  I realize the final product requires a pile of grueling, detailed work, but I want to make sure this basic assumption is true going in:

 

With an Artix-7 design using the "AXI Memory Mapped to PCI Express (PCIe) Gen2" together with appropriate AXI interconnect and cdma, along with a Linux PCIe kernel module/driver for the host, it will eventually be possible for the host CPU to read/write block memory within the FPGA, and for the FPGA to read/write memory on the host. 

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vortex1601
Explorer
Explorer
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Registered: ‎12-11-2017

XDMA (pg195) is a more integrated DMA solution than CDMA, and it has driver support. XDMA supports streaming DMA or memory-mapped DMA. Lots of folks use it here.

If you don't care about speed (at least at the beginning) then you don't even need to do DMA, just use the PCIE-AXI bridge (pg055) and use programmed I/O. Write speed will be about 125MB/s, read ... much slower (4-8 MB/s) due to switch latency. But you design something in a few minutes and start testing right away using a Linux tool called pcimem to peek and poke the address map. This is a good starting point to make sure your user logic works.

 

Getting DMA to work takes more effort. XDMA does have a 'bypass' path option, but it doesn't really work properly (DMA is 64/128bit, bypass is only 32bit on the non-Ultrascale version - a shortcoming I've complained about before.)

 

Knowing, this, if you plan ahead you can switch in XDMA when your software person is ready to test their driver.

 

Finally, get to know System ILA - it's incredibly useful.

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vortex1601
Explorer
Explorer
973 Views
Registered: ‎12-11-2017

XDMA (pg195) is a more integrated DMA solution than CDMA, and it has driver support. XDMA supports streaming DMA or memory-mapped DMA. Lots of folks use it here.

If you don't care about speed (at least at the beginning) then you don't even need to do DMA, just use the PCIE-AXI bridge (pg055) and use programmed I/O. Write speed will be about 125MB/s, read ... much slower (4-8 MB/s) due to switch latency. But you design something in a few minutes and start testing right away using a Linux tool called pcimem to peek and poke the address map. This is a good starting point to make sure your user logic works.

 

Getting DMA to work takes more effort. XDMA does have a 'bypass' path option, but it doesn't really work properly (DMA is 64/128bit, bypass is only 32bit on the non-Ultrascale version - a shortcoming I've complained about before.)

 

Knowing, this, if you plan ahead you can switch in XDMA when your software person is ready to test their driver.

 

Finally, get to know System ILA - it's incredibly useful.

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jdabbs003
Observer
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Registered: ‎10-05-2016

Thanks for the info!

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vortex1601
Explorer
Explorer
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Registered: ‎12-11-2017

A follow-up:

Since Vivado 2018.2, the XDMA block now properly supports bypass (partly because I flagged it with Xilinx and made a case to fix it.)

For all but the smallest Artix family they upgraded the block to 4.1 (was 2.8) so now you can support bypass as well. This allows you to test using pcimem without having to wrangle the DMA block. It also allows another DMA in your system to treat your device as a target. See PG195.

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