I am trying to use 7-series Integrated Block for PCI Express (3.3) for my project (Vivado 2018.1) and I have some questions about how to make a connection between PC and my FPGA (PCI interface).
Firstly, for writing purpose, I use AXI-stream interface and I know the detail about header, layers etc. However, I do now know what to write in address field. I know that I should use "BAR" but I really do now understand how to use it. Now is my questions:
1.1) How can I take the address range from my PC?
1.2) Should I start with address "0x00000000" or is there any way to access base address? What is the way for directly accessing it?
Secondly, for reading purpose, I will take some data from my PC. Now is my questions:
2.1) Should I decode the address field? I mean will I take a base address with respect to PC or my interface?
3.1) If I use AXI-Stream interface, should I configure cfg_* interfaces?
It's unclear what it is you want to do. From the FPGA end, the BARs are somewhat irrelevant. The BARs are assigned by the host and are used by the driver to communicate with the card via MMIO. So on the card you'll see read and write requests that target the card's BARs, and you'll have to write logic to respond to those appropriately. If you want to read and write host system memory, then you can issue read and write requests. However, beware: you'll want the driver to provide the addresses to the card, otherwise you risk corrupting system memory. Additionally, the card sees physical address space, so you'll need to make sure that the driver converts any addresses to physical addresses before providing them to the card.