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Registered: ‎07-23-2019

PCIe xdma bypass burst transfer support


I have enable bypass interface in xdma IP. I am obseving only 32bit data getting trasfer from Host to Bypass interface port. Does bypass interface support burst transfer ? and if yes what utility i can use to test it.

sudo dd if=data/datafile1_4K.bin of=/dev/xdma0_bypass_h2c_0 bs=4096 count=1


It will be helpful if someone explain why 3 devices are getting created in /dev directory for bypass interface





if i try to transfer data to /dev/xdma0_bypass_h2c and /dev/xdma0_bypass_c2h. i am able to receive data in bypass interface whereas if try to transfer data to /dev/xdma0_bypass i am not observing any daya on bypass interface and i am getting following error.

sudo dd if=data/datafile1_4K.bin of=/dev/xdma0_bypass bs=4096 count=1
dd: error writing '/dev/xdma0_bypass': Invalid argument
1+0 records in
0+0 records out
0 bytes copied, 9.4027e-05 s, 0.0 kB/s


Does anyone tried to use Bypass inteface for peer-peer transfer or does anyone have any info how it could be done with xilinx xdma IP/drivers






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Registered: ‎06-29-2018

Re: PCIe xdma bypass burst transfer support


I too am trying to get peer to peer data transfer using Xilinx XDMA.

two FPGA's having XDMA IP cores with Descriptor bypass and DMA bypass interface enabled.

I am trying to load descriptors in FPGA1 to fetch or write data from the second FPGA2.

I don't understand what address I have to provide to fetch data from F2. 

I have loaded the descriptor in F1 with src address falling in the DMA Bypass BAR of F2, but after loading the DMA engine Stalls. it shows busy all the time. 


As for the XDMA Byass burst support, yes the DMA bypass interface supports Burst transfer, the Linux drivers provided has only 32-bit data support (I don't know why), but I have tried the burst transfer in windows and works just fine like the normal DMA h2c and c2h transfer.

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