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Visitor irshad579
Visitor
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Registered: ‎09-12-2019

Pcie4 ultra scale plu reset for root port mode

Hi,

I am using pcie4 IP in my design as root port mode.

Is there anway to reset the IP from my RTL logic without using sys_reset?

If i am using cfg_hot_reset_in siganal for reseting the IP, is it having the same effect as sys_reset pin assertion.

If it is not, is there any option to generate a similar effect as as sys_reset assertion.

I appreciate your helps

 

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