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rhameed
Visitor
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Registered: ‎01-07-2016

Possible to use Pre-defined Base Address for PCIe?

I have a PCIe based design on my VCU118 board which is working fine in a linux system. The system exposes 3 BARs to the host system and the linux system assigns addresses to each BAR as it should and I am able to read/write to the FPGA address spaces from linux.

 

However now I am interfacing this design to a different host which is an embedded processor on a development board. However even though that embedded processor board is configured as a root complex, its driver is fairly primitive and it does not have the ability to read / write the BARs of the end-point device. Instead it assumes a static address for the end-point and assumes that the end-point device itself will write this address to the BAR register on that end-point device.

 

So my question is that is there anyway provided in the Xilinx Ultrascale+ PCIe block to setup the address in a BAR locally without the root complex actually coming in and writing the address in the BAR?

 

Btw I am using the DMA/Bridge IP for PCIe

 

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pumpkin
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Registered: ‎06-22-2011

 

As an alternative, you can enable the AXI-Lite slave interface, and change the BAR registers through this interface during system initialization.

 

 

Chao

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