cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
421 Views
Registered: ‎05-17-2018

QDMA : WPL REN, WRQ register

Hi,

We have implemented the QDMA and we are in the phase of debuging our integration. Looking at page 130 of PG302 V2.0 there are a set of stat registers (0x0A88 to 0x0AAC). What is the purpose of the following counters :  

  • QDMA_C2H_STAT_WRQ_OUT
  • QDMA_C2H_STAT_WPL_REN_ACCEPTED
  • QDMA_C2H_STAT_TOTAL_WRQ_LEN
  • QDMA_C2H_STAT_TOTAL_WPL_LEN

And mode precisely for what theabbreviation WRQ & WPL stands for ?

Thanks in advance,

Renaud 

0 Kudos
2 Replies
Highlighted
355 Views
Registered: ‎03-22-2013

@xilinx team,

Xilinx implements registers and mention them in a document and Xilinx doesn't have any answer about that?

Maybe another example of the quality of documentation ....

https://forums.xilinx.com/t5/PCI-Express/QDMA-AXI4S-Interfaces/td-p/937150

Best regards,

Christian

0 Kudos
Highlighted
Moderator
Moderator
309 Views
Registered: ‎06-29-2011

Hi @rdk 

Please find below what the abbreviations for WRQ and WPL are.

WRQ -> Write Request
WPL -> Write Completions

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

Kind regards,
Gareth
0 Kudos