04-25-2019 05:12 AM
We have implemented the QDMA and we are in the phase of debuging our integration. Looking at page 130 of PG302 V2.0 there are a set of stat registers (0x0A88 to 0x0AAC). What is the purpose of the following counters :
And mode precisely for what theabbreviation WRQ & WPL stands for ?
Thanks in advance,
05-16-2019 01:11 PM
Xilinx implements registers and mention them in a document and Xilinx doesn't have any answer about that?
Maybe another example of the quality of documentation ....
06-20-2019 07:40 AM
Please find below what the abbreviations for WRQ and WPL are.
WRQ -> Write Request
WPL -> Write Completions