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Visitor simonsabato
Registered: ‎05-19-2018

QDMA changes in 2019.1?

We have a design using QDMA v3.0 with Vivado project flow, via patched version 2018.3_AR72013.   After upgrading IP there was a warning to review QDMA parameters.  I don't see any release notes, doc updates, or anything like https://www.xilinx.com/Attachment/Xilinx_Answer_71737_QDMA_Migration_Guide_2018_2_to_2018_3_1.pdf which we used for the last migration.   However, with our migrated config, I'm seeing that a port has disappeared (axis_c2h_status_imm_or_marker) and there are some new ports (cfg_function_status, cfg_max_read_req,cfg_max_payload,cfg_flr_in_process,cfg_vf_flr_in_process).  Where/when can I find docs that describe how to use these new ports?  We'd like to start testing the 2019.1 release but I don't really feel like guessing how to connect these ports (not to mention if there are less obvious changes internally to registers, drivers, etc) 



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Xilinx Employee
Xilinx Employee
Registered: ‎08-06-2008

Re: QDMA changes in 2019.1?


The changes in a new version of an IP is listed in the Change Log. You can view the change log for QDMA in the IP Catalog as shown below:



axis_c2h_status_imm_or_marker is mentioned in the change log as removed because it was unused. For the other ports, please refer to PG213. These ports are from the integrated PCIe hard block and hence not mentioned in the QDMA product guide. We will add a note in PG302 pointing to PG213 in a future release of the doc to avoid confusion.


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