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Visitor xivar
Visitor
348 Views
Registered: ‎08-20-2019

QDMA example design using Vivado 2019.1

I have been trying to run the QDMA example design (AXI Memory Mapped and AXI4-Stream WithCompletion Default Example Design) on a custom FPGA board. The board uses a Virtex Ultrascate+ device and I'm using Vivado 2019.1 for compiling the deisgn.

The code compiles fine and I am able to see the device on lspci. But I am unable to run any of the example scripts successfully. I have tried various configurations of the IP without sucess (I could successfully run an XDMA based design though on the same board).

Following is the output from the dmactl utility

# dmactl dev list
qdma01000	0000:01:00.0	max QP: 0, -~-

also this

# dmactl qdma01000 devinfo
=============Hardware Version============

RTL Version         : RTL Base
Vivado ReleaseID    : vivado 2019.1
Everest IP          : Soft IP

============Software Version============

qdma driver version : 2019.1.125.211.

=============Hardware Capabilities============

Number of PFs supported                : 1
Total number of queues supported       : 2048
MM channels                            : 1
FLR Present                            : no
ST enabled                             : yes
MM enabled                             : yes
Mailbox enabled                        : no
MM completion enabled                  : no

Could anyone let me know what is going wrong here? Any help in this direction will be greately appreciated :)

 

EDIT: Attaching output of qdma_run_test_pf.sh script

# sh qdma_run_test_pf.sh 01000 0 4
01000 0 4 0 0 0
qdma01000	0000:01:00.0	max QP: 0, -~-
***********************************************
AXI-MM for Func 01000 Start
setting up qdma01000-mm-0
q add failed for qdma01000-mm-0
setup for qdma01000-MM-0 done
cmp: /tmp/out_mm01000_0: No such file or directory
**** Test pass. Queue 0
cleaning up qdma01000-st-0
-----------------------------------------------
setting up qdma01000-mm-1
q add failed for qdma01000-mm-1
setup for qdma01000-MM-1 done
cmp: /tmp/out_mm01000_1: No such file or directory
**** Test pass. Queue 1
cleaning up qdma01000-st-1
-----------------------------------------------
setting up qdma01000-mm-2
q add failed for qdma01000-mm-2
setup for qdma01000-MM-2 done
cmp: /tmp/out_mm01000_2: No such file or directory
**** Test pass. Queue 2
cleaning up qdma01000-st-2
-----------------------------------------------
setting up qdma01000-mm-3
q add failed for qdma01000-mm-3
setup for qdma01000-MM-3 done
cmp: /tmp/out_mm01000_3: No such file or directory
**** Test pass. Queue 3
cleaning up qdma01000-st-3
-----------------------------------------------
AXI-MM for Func 01000 End
***********************************************
***********************************************
AXI-ST H2C for Func 01000 Start
setting up qdma01000-st-0
q add failed for qdma01000-st-0
#### ERROR Test failed. Transfer failed ####
cleaning up qdma01000-st-0
setting up qdma01000-st-1
q add failed for qdma01000-st-1
#### ERROR Test failed. Transfer failed ####
cleaning up qdma01000-st-1
setting up qdma01000-st-2
q add failed for qdma01000-st-2
#### ERROR Test failed. Transfer failed ####
cleaning up qdma01000-st-2
setting up qdma01000-st-3
q add failed for qdma01000-st-3
#### ERROR Test failed. Transfer failed ####
cleaning up qdma01000-st-3
AXI-ST H2C for Func 01000 End
***********************************************
***********************************************
AXI-ST C2H for Func 01000 Start
qdma_run_test_pf.sh: line 435: 0 + - : syntax error: operand expected (error token is "- ")

 

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6 Replies
Visitor xivar
Visitor
322 Views
Registered: ‎08-20-2019

Re: QDMA examble design using Vivado 2019.1

So I found some clue.

I regenerated QDMA IP using vivado 2018.3 and also did the entire design and implementaion on 2018.3. However, I encountered the same issues when testing it on the card - example scripts didn't run successfully.

I checked out 2018.3 branch of Xilinx dma_ip_drivers (https://github.com/Xilinx/dma_ip_drivers), compiled and installed it. Then the board started working. I could also run the qdma_run_test_pf.sh script successfully. So it may be that the driver software on master is broken (just a wild guess).

I also tried running 2018.3 driver on a QDMA design generated and compiled using 2019.1. This time, however, the host machine failed to boot with the old driver (I am not sure what's going on here). When I installed the latest drivers (from master), the machine boots up fine. But, again, the example applications didn't work.

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Xilinx Employee
Xilinx Employee
287 Views
Registered: ‎08-06-2008

Re: QDMA examble design using Vivado 2019.1

Could you confirm if the 2019.1.2 Vivado QDMA example design and the latest QDMA driver from the link below is working or not? Please note the latest driver has 2019.1 patch release.

https://github.com/Xilinx/dma_ip_drivers/tree/master/QDMA/linux-kernel

If you are running into issue, please re-confirm the details of the issue.

Thanks.

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Visitor xivar
Visitor
273 Views
Registered: ‎08-20-2019

Re: QDMA examble design using Vivado 2019.1

Hi , thanks for your reply. I am not using 2019.1.2, I am running 2019.1 (without any release patches). The release notes for these patches doesn't mention anything about QDMA, so is it safe to assume that this will not affect in my case?

With regards to the driver, I tried the commit 71bdd3cc03eb60f6dcdd3f72dc74ec33fdb222a9, which seems like the last commit in the repo (from the link you attached).

I can confirm that I am unable run QDMA example applications successfully using Vivado 2019.1 and the latest driver. I have tried to capture relevant details in my original post. Please let me know if you need more information or anything specific. I would have assumed dmactl to show something like the following if everything was alright with QDMA.

# dmactl dev list
qdma01000	0000:01:00.0	max QP: 512, 0~511

(Note: this particular one is by using driver/Vivado 2018.3)

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Visitor xivar
Visitor
252 Views
Registered: ‎08-20-2019

Re: QDMA examble design using Vivado 2019.1

I installed the patch 2019.1.2, regenerated QDMA IP, and re-implemented in the design. Used the latest driver as well for the testing. The results I got are the same.

# dmactl dev list
qdma01000	0000:01:00.0	max QP: 0, -~-

What does that line mean, actually? Can anyone explain that to me? Thanks.

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Visitor s.lyons
Visitor
173 Views
Registered: ‎06-10-2019

Re: QDMA examble design using Vivado 2019.1

 


# dmactl dev list
qdma01000	0000:01:00.0	max QP: 0, -~-

What does that line mean, actually? Can anyone explain that to me? Thanks.



This command displays the list of connected qdma devices. 

01 is the number of the pci bus or port that the device is connected to.

00, is the number of the device connected through this port.

and 0 is the number of the function, either physical or virtual on this device.

qdma01000 is the way this information is written for the use of dmactl.


	0000:01:00.0	

0000:01:00.0 is where this device and function's information is stored , 

i.e. it is stored here :

/sys/bus/pci/devices/0000:01:00.0/

 

max QP: 0, -~-

max QP refers to the maximum number of queus that are assigned to this function.

The value for the maximum number or queues is stored in

/sys/bus/pci/devices/0000:01:00.0/qdma/qmax

The value can be displayed by running the following command

cat /sys/bus/pci/devices/0000:01:00.0/qdma/qmax

This command should return 0 for you as the maximum number of queues is shown here


# dmactl dev list
qdma01000	0000:01:00.0	max QP: 0, -~-

You can set a new value to qmax by using the echo command, as shown here

echo 512 > /sys/bus/pci/devices/0000:01:00.0/qdma/qmax

 

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Visitor xivar
Visitor
123 Views
Registered: ‎08-20-2019

Re: QDMA examble design using Vivado 2019.1

Thanks s.lyons for the detailed explanation.

FWIW, I am not able to set the max number of queues by writing to qmax

echo 512 > /sys/bus/pci/devices/0000:01:00.0/qdma/qmax

It just returns 0 on a read. And I have checked, it's not an issue related to write permissions.

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