11-18-2008 01:23 PM
I have implemented XAPP1052 and have seen it behave like the APPNOTE says it will. I am wondering
how I might be able to save the RX data( from PC to END POINT ) into a memory so I can use the
data actually create packets and send then out a to be designed camera port.
Thank You for any help,
03-18-2010 01:04 PM
01-06-2013 11:56 PM
We have modified the BMD design to transmit data from Endpoint (i.e FPGA) to PC. Able to send continuous stream to PC from FPGA. The modification was done in the TX_ENGINE and worked fine. Somehow I am not able to tap the incoming packets (from PC to FPGA). In RX_ENGINE there are multiple states like BMD_64_RX_MEM_RD32_QW1,BMD_64_RX_CPLD_QW1 etc. I have already explored the linux driver and sending a pattern of data. In xapp1052, it is mentioned that the RX data is discarded. But not specifically mentiond about how to tap and save incoming data. It is very confusing.Also tried to get help from ug517 but kinda unsuccessful. Kindly help.
01-22-2013 10:07 PM - edited 01-22-2013 10:09 PM
In xapp1052, it is mentioned that the RX data is discarded. But not specifically mentiond about how to tap and save incoming data. It is very confusing.Also tried to get help from ug517 but kinda unsuccessful.
Can you please attach your design files here,would try to debug the issue.
--It will work :)
02-21-2013 11:49 PM
If anyone has got a solution to this problem, kindly update here... i have opened a webcase today, in case if i get solution, i will post here..
04-02-2013 03:16 AM
in 1052, the data from FPGA to PC can be writen into memory of PC, the app in PC can read away these data (this need to modify driver);
the data from PC to FPGA are discarded, if you want to use these data, you need to modify the design, you can store these data into one fifo or BRAM or DDR