10-18-2011 02:18 AM
I'm based on the AR43371 design (http://www.xilinx.com/support/answers/43371.htm) and I would like to add the possibility to send an MSI over the PCIe to the Host CPU (not the microblaze), but I don't understand how to achieve that goal.
In fact, I would like to drive the axi_cdma_0 and axi_cdma_1 from the Host CPU (map their registers inside PCI BARs) and receive MSI 0 when axi_cdma_0 is done and MSI 1 when axi_cdma_1 is done (for example).
Inside the documentation (ds820_axi_pcie.pdf), I read that I can send an MSI with the INTX_MSI_Request signal, but how can I select the associated message number itself?
Thanks in advance.
10-18-2011 06:01 AM
I think this is a limitation of the axi_pcie compared with the native pcie block: only one vector, no multiple vectors.
Could anyone confirm this assertion?
Also, could anyone point out what are the other limitations of the axi_pcie compared with the native pcie block?
In terms of achievable bandwidth?
In terms of other functionalities?
10-18-2011 06:20 AM
Yes axi_pcie only supports one vector.
There isn't any document as such that compares between the two cores but you could take a look at the data sheet of the cores and compare the provided list of features.
10-18-2011 07:02 AM
Thanks for your answer.
I was asking if anyone knows about other limitations because the mono-vector limitation is not written inside the lastest axi_pcie product specification.
10-19-2011 05:42 AM
i have the same Question about how to send axi_DMA inerrupt througth axi_pci without the use of microblaze processor
how can i start such this issue?
10-21-2011 02:15 AM
I think the best method is to create an axi_intc to control your different interrupt sources and connect the Irq output port of the axi_intc to the INTX_MSI_Request input port of the axi_pcie.
Note that you can bypass the use of the axi_intc and connect your interrupt sources directly to the INTX_MSI_Request input port of the axi_pcie.
For the axi_intc, I think the output must be level for INTX and edge for MSI.
Could anyone confirm?
05-02-2016 08:09 AM
I am currently trying to do the same: using an AXI INTC to trigger MSI interrupts using the AXI PCIe endpoint bridge.
Usually AXI INTC is used with Microblaze-based systems. But it is possible to remap most of the ports to the AXI PCIe bridge.
At the last point, I ran into a problem. 'processor_ack' expects a 2 bit vector. 'INTX_MSI_Grant' is only a single bit vector. :-(
10-01-2016 02:13 AM
10-08-2016 06:35 PM
Thanks for you response.I noticed your VHDL handskake code require must be MSI interrupt.But in my application,
I used legacy interrupt.I also used signal INTX_MSI_Grant output form axi bridge IP core as a handshake signal.
But I don't know how many cycle that INTX_MSI_Requst signal should be keep assert.Do you have any idea?
09-11-2018 06:51 AM
I was wondering if you could help me. I am having the same issue and I implemented your solution, but I still cannot see any interrupts at the host. I have 2 interrupts going into the INTC ip core, but the host only registers 1 MSI interrupt.
Can you provide more details on how you had the INTC and PCIE core setup?
Did you have any code running on the Microblaze to support the interrupts?