cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Observer
Observer
3,386 Views
Registered: ‎07-17-2008

Synchronous set of llk_rx_sofn and llk_rx_eof_n on V5 PCIe integrated EP block

Hi all

Does anybody  take such situation:  

while active l0_legacy_int_funct0 and extracting memory read pkt from the RX buffer integrated block sets synchronous llk_rx_sofn and llk_rx_eof_n signals 

in the same cycle, without significiant data, then sets valid signals with valid data (see attached file).

That does it mean, who knows? 

Synchro_start_end_1.bmp
0 Kudos
1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
3,206 Views
Registered: ‎04-06-2010

Were you able to get to the bottom of this?

I'm curious on what caused this.

0 Kudos