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Registered: ‎11-16-2017

The debug hub core was not detected when testing the pcie streaming data

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I am following the example design of ug920-kcu105-pcie-streaming-data-plane-trd on kcu_105 board. The vivado can detect my board, but after I used Program Device to program my  trd03_base_top.bit file, there is something wrong.

The software told me that the clock connected to the debug hub core is not free, I don't know how to deal with that.


 

PCIe_wrong.png
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Registered: ‎11-16-2017

Re: The debug hub core was not detected when testing the pcie streaming data

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Solved.

Just use the back USB interface to guarantee the voltage supply.

Thank you very much.

 

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Registered: ‎02-11-2014

Re: The debug hub core was not detected when testing the pcie streaming data

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Hello @yzzhsx12345,

 

Your screenshot is very difficult to read. But typically if the design doesn't have a debug_hub then this warning will also be displayed. Looking at the Block Diagram, I do not see anything that would be using a debug_hub by default. This is most likely an expected message.

 

Do you continue with the steps in UG920 "Bringing up the Design?" Do you reboot the machine and verify the card can be detected? Are you seeing the LED's flash per UG920 description?

 

Thanks,
Cory

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Re: The debug hub core was not detected when testing the pcie streaming data

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This happens when I  Program the Dual QSPI Flash devices.

 

 

Vivado% source kcu105_program_spi.tcl
# open_hw
# connect_hw_server -url localhost:3121
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2016.1
**** Build date : Apr 8 2016-16:12:32
** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.


# current_hw_target [get_hw_targets */xilinx_tcf/Digilent/*]
# set_property PARAM.FREQUENCY 15000000 [get_hw_targets */xilinx_tcf/Digilent/*]
# open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210308A1CCDC
# current_hw_device [lindex [get_hw_devices] 0]
# refresh_hw_device -update_hw_probes false [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xcku040 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
# create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q256-1.8v-spi-x1_x2_x4_x8}] 0]
# set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# refresh_hw_device [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xcku040 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
# set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.FILES [list "kcu105_pcie_x8_gen3_primary.mcs" "kcu105_pcie_x8_gen3_secondary.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
# set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; };
ERROR: [Labtools 27-3165] End of startup status: LOW
program_hw_devices: Time (s): cpu = 00:00:31 ; elapsed = 00:00:31 . Memory (MB): peak = 316.367 ; gain = 2.676
ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors.

while executing
"program_hw_devices [lindex [get_hw_devices] 0]"
invoked from within
"if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property P..."
(file "kcu105_program_spi.tcl" line 21)

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Registered: ‎11-16-2017

Re: The debug hub core was not detected when testing the pcie streaming data

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I did it once again, it seems different now. How I can operate the clock of dbg_hub?

Now the output is as follows:

 

 

 

Vivado% source kcu105_program_spi.tcl
# open_hw
# connect_hw_server -url localhost:3121
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2016.1
**** Build date : Apr 8 2016-16:12:32
** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.


# current_hw_target [get_hw_targets */xilinx_tcf/Digilent/*]
# set_property PARAM.FREQUENCY 15000000 [get_hw_targets */xilinx_tcf/Digilent/*]
# open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210308A1CCDC
# current_hw_device [lindex [get_hw_devices] 0]
# refresh_hw_device -update_hw_probes false [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xcku040 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
# create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q256-1.8v-spi-x1_x2_x4_x8}] 0]
# set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# refresh_hw_device [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xcku040 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
# set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.FILES [list "kcu105_pcie_x8_gen3_primary.mcs" "kcu105_pcie_x8_gen3_secondary.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
# set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
# if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; };
INFO: [Labtools 27-3164] End of startup status: HIGH
program_hw_devices: Time (s): cpu = 00:00:12 ; elapsed = 00:00:12 . Memory (MB): peak = 316.199 ; gain = 2.691
# program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
Performing operation on qspi device 0
Mfg ID : 20 Memory Type : bb Memory Capacity : 19 Device ID 1 : 0 Device ID 2 : 0
Performing Erase Operation...
Erase Operation successful.
Performing Program and Verify Operations...
Program/Verify Operation successful.
Performing operation on qspi device 1
Mfg ID : 20 Memory Type : bb Memory Capacity : 19 Device ID 1 : 0 Device ID 2 : 0
Performing Erase Operation...
Erase Operation successful.
Performing Program and Verify Operations...
Program/Verify Operation successful.
INFO: [Labtoolstcl 44-377] Flash programming completed successfully
program_hw_cfgmem: Time (s): cpu = 00:00:01 ; elapsed = 00:01:34 . Memory (MB): peak = 318.699 ; gain = 2.500
# close_hw_target
INFO: [Labtoolstcl 44-464] Closing hw_target localhost:3121/xilinx_tcf/Digilent/210308A1CCDC
# disconnect_hw_server localhost:3121
# close_hw
****** Webtalk v2016.1 (64-bit)
**** SW Build 1538259 on Fri Apr 8 15:45:27 MDT 2016
**** IP Build 1537824 on Fri Apr 8 04:28:57 MDT 2016
** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.

source C:/Bin/vivado_project/kcu105_pcie_downloaded/ready_for_download/.Xil/Vivado-16336-van-ecs00185/webtalk/labtool_webtalk.tcl -notrace
INFO: [Common 17-206] Exiting Webtalk at Tue Nov 06 16:10:57 2018...
Vivado%

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Registered: ‎11-16-2017

Re: The debug hub core was not detected when testing the pcie streaming data

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I tried again and still this error: End of startup status: LOW

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Registered: ‎02-11-2014

Re: The debug hub core was not detected when testing the pcie streaming data

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Hello @yzzhsx12345,

 

Something I think you should try is using a 2017.3 HW Server. It looks like you are using 2017.3 HW Manager, but then a 2016.1 HW Server starts up. This could be causing some issues. Let's remove this discrepancy and see if that resolves the issue.

 

Thanks,
Cory

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Re: The debug hub core was not detected when testing the pcie streaming data

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Tried 2017.3, still the same error.

 

Can I uninstall Vivado 2017.3 and wipe the drivers of 2017.3 completely so I can use 2016.1 version to design?

2017.3.png
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Re: The debug hub core was not detected when testing the pcie streaming data

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Solved.

Just use the back USB interface to guarantee the voltage supply.

Thank you very much.

 

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