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Observer fab
Observer
1,369 Views
Registered: ‎04-09-2018

Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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Hi everybody, I'm trying to implement the design in the image 1 on a kc705 (PCI Express Gen 2) using Vivado 2016.4 . I have already successfully implemented the design in the image 2, always on a kc705. I have studied the manuals and the user guides, searched for informations that could help me to resolve my issue, but I am always stuck in the same situation: from the linux machine I can't write or read data in the RAM memory, even if the linux machine recognises the DMA/Bridge core. I tried a design with a DMA bridge and a Microblaze interconnected to the RAM, but only the Microblaze accessed the memory. During my researching I have found that: the core DMA/Bridge has a bug in the managing of the user interrupt (ar#67111), the driver developed from Xilinx for the core DMA/Bridge core has 4 modes of functioning (pg195, pg 94, 21 February 2017) but I can't find the way to activate the mode to recognise the user interrupt (XDMA0_events_*). I know that there are other 2 cores to use the PCI express, but they require a custom linux driver, and I am not a developer of linux driver , yet. I am trying to understand if what I want to do is possible, and if yes, what I forgot to do to accomplish my goal. In few words what I need to understand is how to manage the user interrupt using the DMA/Bridge Subsystem for PCI Express, using Vivado 2016.4, or another upgraded version of Vivado, if can resolve my problem. Thanks for your attention and your help.

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Xilinx Employee
Xilinx Employee
1,655 Views
Registered: ‎12-10-2013

Re: Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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Hi Fab,

 

The DMA core in endpoint mode can only initiate user interrupts via the IRQ interface as described in PG195, and requires some setup at the IP level and user logic, as well as in the DMA registers.  While you may be able to create interrupts, you will need to be cognizant of this setup and the rules of usr_irq.   I don't believe usr_irq are handled in the reference driver provided in AR65444.  

 

With some work, you could likely get to where the usr_irq interface could be used to signal the process of a backend interrupt, but there is no "handling" of interrupts from PCIe on the endpoint.  Only initiating.

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Observer fab
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Registered: ‎04-09-2018

Re: Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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To be more specific, the function used by the linux driver give me the same error of when I can't access the RAM from it. I have tried even the design found here (https://forums.xilinx.com/t5/PCI-Express/Data-transfer-from-FPGA-to-PC/td-p/825951), connecting (and not doing it, like in the design) the output of the irq acknoledge of the DMA/Bridge to the interrupt manager of the Microblaze, but the result is always the same: when I attach to the RAM the DMA/Bridge and another core that have to access the RAM, only this second core could access it, the DMA/Bridge no. Thanks for your attention and your help.

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Observer fab
Observer
1,259 Views
Registered: ‎04-09-2018

Re: Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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Another information that maybe is more important than other I said: the DMA/Bridge core is in Endpoint mode. Maybe in this mode it can't manage the interrupts from other cores, but only in Root Complex mode?  Thanks for your attention and your help.

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Xilinx Employee
Xilinx Employee
1,656 Views
Registered: ‎12-10-2013

Re: Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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Hi Fab,

 

The DMA core in endpoint mode can only initiate user interrupts via the IRQ interface as described in PG195, and requires some setup at the IP level and user logic, as well as in the DMA registers.  While you may be able to create interrupts, you will need to be cognizant of this setup and the rules of usr_irq.   I don't believe usr_irq are handled in the reference driver provided in AR65444.  

 

With some work, you could likely get to where the usr_irq interface could be used to signal the process of a backend interrupt, but there is no "handling" of interrupts from PCIe on the endpoint.  Only initiating.

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Observer fab
Observer
1,231 Views
Registered: ‎04-09-2018

Re: Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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Hi bethe,

thanks for your answer and your help. I will work on it trying other design to resolve my tasks.

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Visitor gily
Visitor
1,180 Views
Registered: ‎02-06-2017

Re: Traffic data from fpga to linux machine using DMA/Bridge Subsystem for PCI Express

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Hi Fab,

 

 
My name is Gil, I am an Account Manager at Jungo Connectivity.
 
As you mentioned you are struggling to read \ write data and not yet a Linux developer, would you consider utilizing an intuitive toolkit that allows hardware diagnostics without writing a single line of code and no WDK, ETK, DDI or any system-level programming knowledge required?
 
Jungo's driver development toolkit WinDriver will provide you with immediate access to your custom PCI hardware allowing you full interaction with the memory ranges of the device (reading, writing and creating registers), by utilizing user level API you will be able to implement the DMA functions you require.

May I propose you evaluate our 30 day fully featured WinDriver tool  kit as a possible solution, during that period you will receive full & free support by our engineers that will be happy to assist you with any technical questions or issues you may face.  
 
Please feel free to contact me directly at gily@jungo.com for any additional information or assistance.
 
Looking forward to hear from you.
 
Best Regards,
Gil
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