07-03-2012 08:14 PM
I am a newer to PCIe and I use the v5vsx95T. Is PCIe IP core a kind of hard core based on GTP? If I want to use it, I must pay? Is there other kind of PCIe IP cores from Xilinx?
07-04-2012 06:44 AM
Sorry, I don't explain clearly.
I am using V5vsx95T, and I implemented the PCIe interface based on the GTP. Now I am confused about which PCIe core I should chose, LogiCORE IP Endpoint Block Plus v1.15 or LogiCORE IP Endpoint v3.7? I konw the core V1.15 is hard core and core V3.7 is soft core. What advantage of each core? And which should I chose?
07-04-2012 03:52 PM
As you mentioned, they are both PCI Express cores that operate as an EndPoint device, so they function similarly. And you noted that the EndPoint for PCIe core is a soft core thus it's a paid core (not free). The EndPoint Block Plus for PCIe is a hard block and it's free.
I believe most people are using the EndPoint Block Plus for PCIe core because they're using the hard block thus it's not occupying your logic block and so you can utilize it for some other application. Also it's free and it's a newer core compared to the EndPoint for PCIe soft core.
Users may use the EndPoint for PCIe soft core to support additional PCIe function in the same FPGA. Because you only have one hard block, you are forced to use the EndPoint for PCIe soft core to implement any additional PCIe device.
12-08-2014 05:25 AM
I want to implement PCIe interface on XUPV5 but I am confused about which PCIe cores to use.
as you know LogiCORE IP Endpoint Block Plus v1.15 for PCI Express is in ISE repository
and LogiCORE IP PLBv46 RC/EP Bridge for PCI Express is in EDK. (both cores are Endpoint)
what is different between this two core? and can connect LogiCORE IP Endpoint Block Plus to PLB bus? which should I chose if I want to have a MicroBlaze in my system?
12-09-2014 04:20 AM
PCIe Block Plus core - This has generic transaction inter face at the user side.
PLB PCIe - This has PLB interface on the user side , and this is more used in processor environments like EDK where PLB bus is used..
If you are having design to be built with genric interface on your application layer then Blobk plus core is preferred.
LogiCORE IP Endpoint Block Plus can not be connected to PLB bus as this core provides generic interface not hte PLB.
If you want to design system with microblaze, PLB PCIe core can be used.
12-09-2014 04:26 AM
Have a look at the xapp1000. this is areferance system for ML555 board.
You can take it as a referance and bult for any board.
Below is the link for the xapp.