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Observer mushihao
Observer
322 Views
Registered: ‎05-07-2019

Using PCIe VIP to do DMA access to Xilinx XDMA block

Hi,

Is there any way to use 3rd party PCIe VIP to do DMA access through Xilinx XDMA design? I am reading the xilinx-xdma document, but I didn't find any clue about it.

https://www.xilinx.com/support/documentation/ip_documentation/xdma/v3_0/pg195-pcie-dma.pdf

Thanks,

Hao

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3 Replies
Moderator
Moderator
263 Views
Registered: ‎02-16-2010

Re: Using PCIe VIP to do DMA access to Xilinx XDMA block

Hi @mushihao ,

Generate the IP example design and do simulation. You can know how to initiate DMA transfer from the Root port model.

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Observer mushihao
Observer
250 Views
Registered: ‎05-07-2019

Re: Using PCIe VIP to do DMA access to Xilinx XDMA block

Hi @venkata ,

Thanks. I already checked the example design and I think it sent transactions through AXI stream interface then to the root port model. I would like to know what is the data packet (addr and data pair) in pcie root port model directly. Please let me know if I misunderstood anything. 

Thanks,

Hao

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Moderator
Moderator
239 Views
Registered: ‎02-16-2010

Re: Using PCIe VIP to do DMA access to Xilinx XDMA block

Hi @mushihao 

If you are looking to check the packet received at the root port, you will have to refer to the documentation of the VIP to know the signals to check.

IP example design helps to understand how does the test bench setup the descriptor and initiates the transfer from endpoint to the root port. If you refer the test bench model, you can find the details. 

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