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jfrye_wmi
Observer
Observer
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Registered: ‎08-19-2019

VCU128 PCI with Intel Host

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Hello, I am trying to get a PCI design up and running for VCU128. Currently I have it hooked into a PCI slot to a Dell Precision T3400. I have connected it to the host's PCI power supply using the ATX Power Supply Adapter Cable. I want the design loaded on the FPGA when the BIOS begins performing link negotiation and the OS performs enumeration. I have tried the following

1. Load the design over JTAG hardware manager and reboot. This fails becuase the PCI power of the host is turned off during reboot, thus power to the FPGA, so the image is lost.

2. Load image from 2GB QSPI Flash Memory. In this case, I believe the FPGA is taking too long to load. The "FPGA DONE" LED appears to come on at least 40 seconds after the power to the FPGA has been resotred. By then, I am sure the BIOS has already executed and we are already well into kernel boot if not completely finished, so there will be no link negotiation. 

Surely mine is a common use case for this board. Has anyone found a way around these problems?

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jfrye_wmi
Observer
Observer
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Registered: ‎08-19-2019

You can use the external power supply. These are my instructions

1. Power down the PC

2. Remove power plug to the PC. Hit power button on PC to diffuse any remaining charge

3. Insert card into PCI slot.

4. Ensure SW5 is in "OFF" (use J1 power from 2x4 PCI power connector) position. Connect external power (2x3 Molex) to J16. Switch postition to on. Board should come on and POWER GOOD LED should go on

5. Load design

6. Put power plug back into PC and hit power button

7. Ensure power to FPGA is always maintained while PC is powered on.

Do not leave FPGA powered for extended periods of time while motherboard is powered off, via

https://forums.xilinx.com/t5/Xilinx-Evaluation-Boards/VCU118-Power-Supply/td-p/815460

View solution in original post

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jfrye_wmi
Observer
Observer
518 Views
Registered: ‎08-19-2019

You can use the external power supply. These are my instructions

1. Power down the PC

2. Remove power plug to the PC. Hit power button on PC to diffuse any remaining charge

3. Insert card into PCI slot.

4. Ensure SW5 is in "OFF" (use J1 power from 2x4 PCI power connector) position. Connect external power (2x3 Molex) to J16. Switch postition to on. Board should come on and POWER GOOD LED should go on

5. Load design

6. Put power plug back into PC and hit power button

7. Ensure power to FPGA is always maintained while PC is powered on.

Do not leave FPGA powered for extended periods of time while motherboard is powered off, via

https://forums.xilinx.com/t5/Xilinx-Evaluation-Boards/VCU118-Power-Supply/td-p/815460

View solution in original post

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barriet
Xilinx Employee
Xilinx Employee
486 Views
Registered: ‎08-13-2007

That's an interesting work-around - thanks for sharing.

In general, the FPGA load time vs the PCIe spec is a challenge... You'll find multiple references to "Tandem" configuration in the PCIe product guides - basically it is a much smaller bitstream than configures the PCIe logic & GTs & a bit of back-end logic to solve the enumeration issues - and the "rest" of the design is loaded later - either from PROM (for Tandem PROM) or across the PCIe bus (for Tandem PCIe).

Here's an intro:

http://www.xilinx.com/video/hardware/create-tandem-pcie-design-for-kcu105.html

Tandem is an important piece of the solution for many PCIe systems and might be a more convenient work-around once you've mastered the flow differences here.

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barriet
Xilinx Employee
Xilinx Employee
483 Views
Registered: ‎08-13-2007

As you noted, this problem isn't unique.

This app note is a bit dated now but has some good background information on the challenges and solution approach:

http://www.xilinx.com/support/documentation/application_notes/xapp1179-tandem-config-pcie.pdf (Using Tandem Configuration for PCIe in the Kintex-7 Connectivity TRD)

Cheers,

bt

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