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Observer
Observer
5,522 Views
Registered: ‎10-22-2008

Version readback PCIe Endpoint Block Plus

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Hi,

can anyone tell me how to read back the version no. of the implemented core? Is there a Config Space register?

 

thx,

Michael

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Xilinx Employee
Xilinx Employee
6,452 Views
Registered: ‎08-07-2007

Hi,

 

The core does not contain this information built in. In other words, the version of the release is not stored in the logic.

 

However, the user could impelement this in either a memory mapped register or you might use the RevisionID register located in the Configuration Space. 

 

Regards

John

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Xilinx Employee
Xilinx Employee
6,453 Views
Registered: ‎08-07-2007

Hi,

 

The core does not contain this information built in. In other words, the version of the release is not stored in the logic.

 

However, the user could impelement this in either a memory mapped register or you might use the RevisionID register located in the Configuration Space. 

 

Regards

John

View solution in original post

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Observer
Observer
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Registered: ‎10-22-2008

Additional question:

 

is there a report where I can find informations about the implemented PCIe core version/patch?

 

Michael

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Xilinx Employee
Xilinx Employee
5,458 Views
Registered: ‎08-07-2007

Hi,

 

When you generate the core a readme file in the core directory that will contain the version info including the patch status if any. This is the only thing I am aware of that informs of the version.

 

I hear what you are saying though, and it would be handy if there was a way for the implemenation tools to read something out of the core netlist to intepret the version.

 

-John

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