Vivado PCIe DMA/Bridge Subsystem for PCI Express v4.1 examples, where are they ?

[terry@beam.ltd.uk]

Hi,

I am experimenting with the PCIe interface using a KCU105 board. I was hoping to try the "AXI4-Stream Example Design" example as mentioned in the PG195 (v4.1) November 22, 2019 document. However there is no mention in the document of where the example code is or how to get it and I have not found it anywhere.

1. Where can I obtain this example code from ?

2. Where is the documentation for the example code ?

Terry

[garethc · Accepted solution]

Hi terry@beam.ltd.uk 

This is using the example design that is provided with the XDMA IP. If you look at PG195 in Example Design Chapter 6 on Page 97 you will see that for various configurations we have built in example designs.

Many of the Xilinx IP deliver example design projects which consist of top-level logic and constraints that interact with the created IP customization. These example designs also typically come with an example test bench to help simulate the design.

To open an example design project for an IP in either a standard project or a Manage IP project, select the IP customization in the IP sources tab, then right-click and select Open IP Example Design from the context menu. The Open IP Example Design dialog box will open for you to specify the location. The project is called <ip_name_ex>. In an IP Integrator block design, either select the IP in the IP Sources or access the IP directly from the block design and use the same procedure as above and right-click and select Open IP Example Design.

[terry@beam.ltd.uk]

Many thanks for the info. I did not know that the core's example could be one of many example designs based on how you had configured the core.

Its a shame the Vivado project information does not contain a title and description field so you know what example and/or project you are actually working with.

Anyway, thanks again.