10-12-2018 02:07 PM
In PG195, version 4.0, table 2-52 till 2-55, there are various registers for monitoring the H2C channel performance DMA. Nevertheless, there's no reference to these registers anywhere, nor how do I use this monitor, what does it monitor, where are the results placed at, etc.
Have anyone used these registers for running the performance test and can clarify?
10-15-2018 01:43 AM
Please read AR65444
A Test is available for the performance oF XDMA with Memory Map interface