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Contributor
Contributor
886 Views
Registered: ‎10-14-2018

XDMA windows 10 driver - bypass mode enable 32GB

Hi all

I have implemented a PCIe design with the dma/bridge subsystem for PCIe core. I am also using the standard supplied windows 10 driver (64 bit), with the added user application , specifically, xdma_rw.exe .

My dma/bridge core is configured with bypass mode enabled, 64 bit enabled, prefetchable,

size is set to 32GB.  my goal is to get direct access to 24GB of DRAM using the  bypass mode.

 

when trying to read/write using bypass on xdma_rw , for example:

xdma_rw bypass write 0x00000004 0x1 , i get this error:

Error opening device, win32 error code: 87.

I also see the wiondows assigned full 32GB resource to my card , under device manager.

 

If I configure the core to , say , 1GB for bypass mode, and reprogram the FPGA, the bypass function works perfectly.

Is there an issue with bypass mode not working with large GB map?

 

Thanks! 

 

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5 Replies
Contributor
Contributor
880 Views
Registered: ‎10-14-2018

Re: XDMA windows 10 driver - bypass mode enable 32GB

added picture of core config

Capture.PNG
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Xilinx Employee
Xilinx Employee
720 Views
Registered: ‎07-26-2012

Re: XDMA windows 10 driver - bypass mode enable 32GB

Since 32GB can be selected with tool, it should work. Can you let me know what device, PCIe Link speed and Link width are you using?

 

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Contributor
Contributor
650 Views
Registered: ‎10-14-2018

Re: XDMA windows 10 driver - bypass mode enable 32GB

Yes, it is Kintex Ultrascale, x8 PCIe gen 3, configures to 256bit data width

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Xilinx Employee
Xilinx Employee
617 Views
Registered: ‎07-26-2012

Re: XDMA windows 10 driver - bypass mode enable 32GB

Actually was 32 GB of memory sapce allocated ?  Depending on BIOS, it seems that some space of 4 GB or more can not be allocated.

 

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Contributor
Contributor
605 Views
Registered: ‎10-14-2018

Re: XDMA windows 10 driver - bypass mode enable 32GB

Hey Kuri,

IYes it is probably a Bios issue, sometimes i get the win32 error when doing xdma_rw bypass write/read <addr> <data> command, sometimes the PC wont even boot.

 

However this made me think.. given I need direct memory access to DRAM (no DMA), hence using bypass mode, what if I do a little trick to "hide" the 32 GB of memory from the bypass master. I was thinking of generating a new AXI IP with a master and slave interface (64bit address, 256 bit data width), short the master out signals to the slave in signals, and the slave out signals to the master in signals. then I put this IP between the bypass master and the DRAM slave, that way I get an indirect memory access, and in address editor I should see the bypass master only see the custom IP, and not the dram, that way i can allocate minimal address space to the bypass master, and still get access to all DDR .

 

you think this is a viable solution?

 

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