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Newbie zinzolin@
Newbie
732 Views
Registered: ‎04-11-2018

ZynqMP PL PCIe Root Port VIVADO project

Hello PCI Express Community,

 

I am interesting by the ZynqMP Linux PL PCIe Root Port exemple design described on the xilinx wiki page

 

http://www.wiki.xilinx.com/ZynqMP+Linux+PL+PCIe+Root+Port

 

I would like to know if it exists a VIVADO project ready for test to make some evaluation of this exemple design on a ZCU106 hardware.

I would like to know the reference of the Root port FMC used for the hardware setup.

 

Sincerely,

Lio

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1 Reply
Xilinx Employee
Xilinx Employee
660 Views
Registered: ‎12-10-2013

Re: ZynqMP PL PCIe Root Port VIVADO project

Hi zinzolin@,

 

We do not have a reference design available at this time for PL Root Port in the ZCU106.  Based on the known issues, I would highly, highly recommend starting this design in 2018.1 when PetaLinux is available.  The setup can be a bit tricky, so if you have Xilinx support via an FAE I would engage them early.   We are working on a "Tips and Tricks" guide for setting up the solution, and I can post back once that is available.  

 

Using 2018.1, you will avoid a number of known issues and having to patch the driver. 

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