02-14-2017 12:02 AM
I'm trying to write windows driver for xdma core(pcie dma subsystem), but not quite understand the adjacent descriptors description section in PG195.pdf
can anyone provide some more info.
what's the relation between adjacent and normal descriptors?
04-25-2019 05:43 AM - edited 04-25-2019 05:44 AM
"The number of additional adjacent descriptors after the descriptor located at the next descriptor address field. A block of adjacent descriptors cannot cross a 4k boundary."
So i suspect that the FIFO fetches a descriptor looks at the adjacent if there are some
he uses the base address of the current descriptor and loads all the adjacent ones
with the descriptor offset. The last of them should have next set if you want to add more
descriptors to the chain.
The other possible thing could be that this is purely for optimization so that it can fetch a bigger block of memory and
the next addresses need to be all set even if there are adjacent descriptors. (From there example driver it looks more like the second case is true)
Suspect it doesn't need to be set if the descriptors are not adjacent in memory (dma memory!).
I have no clue if it is true and they also didn't answer.
06-12-2019 01:53 PM
The next address points to at least one descriptor (of course). So the XDMA core will fetch at least one descriptor from that address.
The extra_adjacent field provides the amount of extra (or additional) descriptors that are adjacent to the first descriptor. I.e. if this number is 0, only 1 descriptor is fetched. If the number is 3, then XDMA is allowed to fetch up to 4 descriptors from the next address.
Setting the field to 0 is always valid, but might prevent efficient (pre)fetching of descriptors.