connecting GTX phy (in gen1 , pcie mode) to Synopsys PCIe controller ... URGENT HELP NEEDED!
i generated a pcie gen1 phy using the GTX wizard (for V6 FPGA, ISE 14.1). I plan to integrate the GTX phy to Synopsys PCIe controller.
Upon simulation, I saw that the rxvalid of the GTX core was asserting too soon as compared to the rxvalid of an actual pcie PHY. as a result my sim was not establishing link up.
my questions are -
1) can i attach the GTX pcie gen1 phy to my gen1 pcie controller seemlessly (over the pipe IF) or do i need to have some form of glue logic in between the controller and GTX?
2) where can i get the details of such glue logic? and example design/doc/xilinx app note/rtl code i can refer to?
3) since the rxvalid is asserting way too soon for the gtx, i searched this forum and found something callex rx_valid_filter. what does this do and is this something i would need to connect the gtx phy to my controller?
4) any other pointers i need to take care of while doing this?