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savijeet21
Visitor
Visitor
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Registered: ‎01-18-2011

data register

while using the PCi express could you please tell me where the data is being stored in a register  if at all during the read and write operations? also in which .v file is this register mentioned?

 

 

i hae found these lines in the BMD_EP_MEM_ACCESS file..... do these represent the databus?

 

 

 

 /*
     *  Extract current data bytes. These need to be swizzled
     *  memory storage format :
     *    data[31:0] = { byte[3], byte[2], byte[1], byte[0] (lowest addr) }  
     */

    wire  [7:0]      w_pre_wr_data_b3 = pre_wr_data[31:24];
    wire  [7:0]      w_pre_wr_data_b2 = pre_wr_data[23:16];
    wire  [7:0]      w_pre_wr_data_b1 = pre_wr_data[15:08];
    wire  [7:0]      w_pre_wr_data_b0 = pre_wr_data[07:00];

    /*
     *  Extract new data bytes from payload
     *  TLP Payload format :
     *    data[31:0] = { byte[0] (lowest addr), byte[2], byte[1], byte[3] }  
     */

    wire  [7:0]      w_wr_data_b3 = wr_data_i[07:00];
    wire  [7:0]      w_wr_data_b2 = wr_data_i[15:08];
    wire  [7:0]      w_wr_data_b1 = wr_data_i[23:16];
    wire  [7:0]      w_wr_data_b0 = wr_data_i[31:24];

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luisb
Xilinx Employee
Xilinx Employee
4,285 Views
Registered: ‎04-06-2010

I would recommend to look in the BMD_EP_MEM.v file.  Look at the case statement on the a_i signal.  Hope this helps.

savijeet21
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4,279 Views
Registered: ‎01-18-2011

thanks. will do the same

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tenantfile
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Registered: ‎05-27-2011

Thanks for giving this knowledge. I was also trying to do this. It works.

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