I've got a VCU128 eval board that will need to operate in a host via PCIe. I expected the factory image to have a PCIe endpoint, but the board won't show up on host lspci. The BIST and IBERT tests seem to be working fine. I did get some BIST failures, but they seem related to the version of Vivado I was running. The GT quads routed to the PCIe blade (224-227) seem to be operating correctly and at the right speed (16 gbps) according to hw_manager IBERT.
Am I mistaken? Does the factory image not contain a PCIe endpoint?
I haven't touched the factory-set jumpers and DIPS, as they seem correct for my application. The DIP switches are set for QSPI image loading, and the jumpers are selecting 16 lane PCIe. The board is sitting in a gen 3 x 16 capable slot that is known to be good. I see no BIOS settings that should cause the enumeration to fail. Enumeration is otherwise completing correctly. I've installed a 3x16 NIC and it enumerates as expected. I've also installed a Xilinx U50 Alveo as a sanity check for the host, and it enumerates as expected as well.
I completed the steps in XTP535, but it seems the only real change I made to the board was to program and enable an external clock source. I suspect this shouldn't be necessary for PCIe endpoint enumeration though.