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Newbie
Newbie
4,100 Views
Registered: ‎02-25-2010

end point for pcie(IP core),max payload size's problem

when cpu send  data to endpoint(size>256Byte), the endpoint would not be found. I failed to see the ID number.IP's max payload size is set to 512B.

why does this happen?

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Newbie
Newbie
4,094 Views
Registered: ‎02-25-2010

I am not sure if the IP core generation is wrong. this ip  don't support the ASY symbol generation.the maxpayload reg is always 0.

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Xilinx Employee
Xilinx Employee
3,880 Views
Registered: ‎04-06-2010

I guessing that within CoreGen you set the Max Payload Size to 512, but this doesn't mean that the system is set to 512.  

By selecting 512 within CoreGen, you're setting the Device Capabilities Register MPS to 512.

The Device Control Register is written to by the Root.

The root determines what to write to the endpoint's Device Control Register once it finds the lowest MPS on the system.  

 

Hope this helps.

 

-Luis 

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