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Visitor hermes.tsai
Visitor
300 Views
Registered: ‎12-24-2018

how to set parameters of PCIe IP to get better performance of Gen2x4?

Hi,
 
We followed PG195 (DMA/Bridge Subsystem for PCI Express) and implemented PCIe Gen2x4 on our own board.
It works well on most of motherboards with Gen2x4.
However, there is one motherboard, Z97-A, which hardly works well with Gen2x4.
Usually this motherboard only can recognize Gen1x4.
 
We tried to put an another commercial card on the same slot and it could be recognized as Gen2x4.
So the motherboard really can support Gen2x4.
 
We used KC705 with xapp1198 (In-System Eye Scan of a PCI Express Link) to run eye scan on this motherboard.
The result is as the pictures below.
 
Ch0:
ch0_shrink.png
 
Ch1:
ch1_shrink.png
 
Ch2:
ch2_shrink.png
 
Ch3:
ch3_shrink.png
Based on eye diagram, does anyone know how to set parameters of PCIe IP to get Gen2x4 on this motherboard?
 
Vivado tool: 2016.3
OS: Windows 10
 
BR,
Hermes 
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1 Reply
Xilinx Employee
Xilinx Employee
204 Views
Registered: ‎08-07-2007

回复: how to set parameters of PCIe IP to get better performance of Gen2x4?

hi @hermes.tsai

 

is the eye diagram scanned at Gen2 speed?

if so, i think the eyes look ok to me.

 

to debug the down grade issue, you can follow the following long form AR. 

The Link Speed Train Down section from Page 11 in the PDF doc.

https://www.xilinx.com/support/answers/56616.html

 

Thanks,

Boris

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