06-11-2018 03:15 AM
Hi everyone,
In VC709 board I found the interconnection between FPGA serial io and PCIE's is
For example 'PCIE_TX3_P' connects to MGTHTXP0,but why not MGTHTXP3.
Who can tell me why the connection is like that ?
Thank you so much
06-11-2018 05:48 AM - edited 06-11-2018 05:49 AM
Have a read of PG054 Chapter 4, the "Recommended GT Locations" section (p.225 onwards) shows you the recommended GT locations for different devices.
06-11-2018 05:48 AM - edited 06-11-2018 05:49 AM
Have a read of PG054 Chapter 4, the "Recommended GT Locations" section (p.225 onwards) shows you the recommended GT locations for different devices.
06-11-2018 06:48 PM
Thanks for the reply!