06-24-2021 04:45 AM
I am trying to do transmit data from PCIe to qsfp , attached my design in the post .. while validating the design there is no error but showing critical warning after implementation about the clocks in the design . can you check anyone in the design give below .
06-30-2021 08:34 AM
Please share the clock warnings details which you are encountering.
07-07-2021 02:51 AM
I share the critical warning and the error getting while generating the bit-stream . Anyone please help me to solve the problem in the design
07-08-2021 10:05 AM
Hi @Surya_ks ,
In your reference design, I am not seeing a clock with name sys_clk. Could you please correct the clock name in your xdc file. Please replace sys_clk with diff_clock_rtl_0 and see still error persist?