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Contributor
Contributor
437 Views
Registered: ‎03-01-2018

s_axis_rq_tready falls during dma write process

Hi,

      Recently,I am working on PCIE DMA, but I met an issue that would load the os reboot.

(1) In most case, I notice that when s_axis_rq_tready turn to 0 and then the OS would be reboot during DMA write process.

      maybe, it is not the directly reason, but I think the s_axis_rq_tready signal maybe  trigger something unexpected.

(2) when s_axis_rq_tready falls to 0, in most case, I notice it could be high again after some cycles.

(3)Sometimes, I notice that s_axis_rq_tready would never pull up again and the os reboot.

(4)Sometimes, I notice I could capture a invld rc tlp packet after s_axis_rq_tready fall to 0. In fact, I add some logic to monitor whether the request tlp sending to host is valid,

    and I never capture a invalid tlp request.

error.png

e1.pnge2.png

//===============================================================================

the log is as follow:

[ 4.429759] {1}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 3
[ 4.438982] {1}[Hardware Error]: event severity: fatal
[ 4.444714] {1}[Hardware Error]: Error 0, type: fatal
[ 4.450446] {1}[Hardware Error]: section_type: PCIe error
[ 4.456664] {1}[Hardware Error]: port_type: 0, PCIe end point
[ 4.463269] {1}[Hardware Error]: version: 1.16
[ 4.468419] {1}[Hardware Error]: command: 0x0007, status: 0x0018
[ 4.475315] {1}[Hardware Error]: device_id: 0000:82:00.0
[ 4.481434] {1}[Hardware Error]: slot: 0
[ 4.486002] {1}[Hardware Error]: secondary_bus: 0x00
[ 4.491734] {1}[Hardware Error]: vendor_id: 0x1af4, device_id: 0x1000       //I changed the id
[ 4.499115] {1}[Hardware Error]: class_code: 010507
[ 4.504751] Kernel panic - not syncing: Fatal hardware error!
[ 4.511163] Kernel Offset: disabled
[ 4.518259] Rebooting in 10 seconds..

//===============================================================================

I didn't know why the exact reason of reboot, does someone who know how to locate the exact reason?

I have read some post issue in this topic, and I found that pcie_tfc_nph_av and pcie_tfc_npd_av always be 2'b11, it

is different from the issue met by others.

 

Best Regards

LiuLuren

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3 Replies
403 Views
Registered: ‎06-21-2017

Re: s_axis_rq_tready falls during dma write process

It's been a few years since I worked with PCIe and I never used the AXI PCIe core, but you want to look into flow control credits.  Before you start a DMA, be sure there are enough flow control credits to account for the entire DMA (512 bytes, or however long your DMA is).  You may need to put in an ILA to monitor these credits while the DMA is occurring and you should be able to figure out how many credits are used to complete a DMA. 

The best I could figure out, these are related to the buffer on the PCIe.  While Direct Memory Access sounds like you are writing directly to the DDR RAM of the PC, everything in the PC has access to the RAM.  There is some buffering in the PC's DMA engine and the credits decrease as the buffer fills.  It increases as the buffer is emptied into the DDR RAM.  Overflow the buffer and bad things happen, data loss, PCIe hang ups, operating system reboots, collapse of the universe into a singularity (only with Windows Vista). 

This is my best guess based on the symptoms.  Good luck.

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Contributor
Contributor
395 Views
Registered: ‎03-01-2018

Re: s_axis_rq_tready falls during dma write process

RE bruce_karaffa:

     Thank you for your reply.

     however long your DMA is ?           now the max payload is 128Bytes.

     yes, I didn't use flow control in my design, but I  monitor the signals of pcie_tfc_nph_av & pcie_tfc_npd_av, their values are always 2'b11, it means that "3 or more credits available",

therefore, it seems that before I send no-posted request, there are enough credits to use. 

     What I couldn't understand is that dma write operation is posted operation, it needn't care about tag and credits.(maybe I am wrong).

and the time that a_axis_rq_tready falls to 1'b0 always appear in dma write process.

 

I would try to add flow control logic to my design to verify the reason.

Best Regards!

LiuLuren

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Contributor
Contributor
378 Views
Registered: ‎03-01-2018

Re: s_axis_rq_tready falls during dma write process

e3.png

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