10-10-2015 07:36 AM
The new V2.7 AXI Memory Map To PCIe is released with vivado2015.3, but the XAPP1171 document and design file is still pretty old ver (for vivado2013.3). I think XAPP1171 script also need to be updated to generate new Ver IPs in new Ver Vivado(please correct me if i am wrong). And, I do not understand why Xilinx never update XAPP1171 script as vivado has been updated so much.
Is there anyone who has idea how to modify the scrip file to generate new ver IPs for vivado2015.3? It will make me nervous when purchased a KC705 board but can NOT use newest vers.
10-12-2015 02:14 AM
02-25-2016 10:00 AM
Ok then Vijay.
If I want to evaluate the design, how do I obtain all of the necessary old ip versions. As I see it , playing russian roulette and just updating the version numbers to those with my version of vivado is likly to fail !
what should we do ?
02-26-2016 02:56 AM
I tried to use XAPP1171, but after updating all IPs it simply failed to synthesize. After some adjustments I got
it compiled, but it still didn't work.
That's why I started to build the similar system from scratch, with the current version of Vivado, sharing the results.
However this approach is probably also not the best one, especially when each design archive is ca 17 MB :-(.
I think that a platform to exchange experiences between the users (including complete designs) would be very useful.