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Visitor adamxia
Visitor
7,789 Views
Registered: ‎03-31-2011

xapp1052 PCIe design for SP605 dev kit does not seem to work wiht ATOM mother board.

I've implemented XAPP1052 on my SP605 dev kit. It work flawlessly with Dell Optiplex 780 under both Window XP and Window7.

But when I try the PCIe implementation with an Atom based mother board, it does not work properly. I away get error from the sample application "Performance Demo". Then I use the PCITREE to check the registers from BAR0, the register cannot be read reliably. I always randomly get 0xFFFFFFFF from some random locations. It takes much longer time to read the BAR space. I have tried different ATOM board such as AAEON TF-COM-LN-A10, and Intel® Embedded Development Board 1-D510. They are all showing the same issue.

If I keep the Initiator_Reset “1” (DCSR bit0=1),  there is no problem to read BAR0 space.

I have check the difference between the working  mother board and not working ones, the Dell uses Intel ICH10 for the PICE root complex, and the Atom boards all use the ICH8 for the PICE root complex.

Anybody would help?

Thanks!

Adam

2011-03-31 20.52.41.jpg
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5 Replies
Xilinx Employee
Xilinx Employee
7,764 Views
Registered: ‎04-06-2010

Re: xapp1052 PCIe design for SP605 dev kit does not seem to work wiht ATOM mother board.

Do you have a link analyzer?

 

If not, then this may be a little difficult to debug.  You're going to have to snoop the MIM interface (with ChipScope) and look for the memory writes and reads that come downstream and make sure that they are setting the  correct registers in 1052 design.  If you don't know what the mim interface is then I recommend looking at the following AR: 

http://www.xilinx.com/support/answers/37472.htm

 

You're also going to have to verify that everything was enumerated correctly; which you can see with the MIM interface.

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Visitor adamxia
Visitor
7,758 Views
Registered: ‎03-31-2011

Re: xapp1052 PCIe design for SP605 dev kit does not seem to work wiht ATOM mother board.

 

Thank you luisb for your quick response.

 

I don't have link analyzer.

Before I set up the ChipScope, I did some extra test.

After I modified the code in the BDM_EP.V to disable the BMD_TX_ENGINE EP_TX by holding init_rst_i "1", I have no more problem reading BAR0 space. Of course the DMA won't work this time. But PIO registers work fine.

 

    BMD_TX_ENGINE EP_TX (

                   ............
                   .............

                  // Initiator Controls

                   .init_rst_i(1),            //  Holding the bit high to disable the engine.

                   ............
                   .............

 

Any Idea?

 

Thanks,

Adam

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Visitor adamxia
Visitor
7,745 Views
Registered: ‎03-31-2011

Re: xapp1052 PCIe design for SP605 dev kit does not seem to work wiht ATOM mother board.

Hi, luisb

 

I have tested wiht the Chipscope. Here are the result:

Although I can see the 0xFFFFFFFFs from PciTree for many locations including the BAR0+0x0004.

There are absolutely no  0xFFFFFFFF showing on MIM transactions.

Please see the picture from my PC snap shot.

What could be the problem?

Thanks,

Adam

BAR0.JPG
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Visitor adamxia
Visitor
7,740 Views
Registered: ‎03-31-2011

Re: xapp1052 PCIe design for SP605 dev kit does not seem to work wiht ATOM mother board.

One more difference I noticed between Intel chipset ICH10 and ICH8 is that the ICH10 has RCBC=64 and the ICH8 with RCBC of 128.

Does this cause problem? 

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Visitor adamxia
Visitor
7,672 Views
Registered: ‎03-31-2011

Re: xapp1052 PCIe design for SP605 dev kit does not seem to work wiht ATOM mother board.

Problem solved.

 

I think it was Intel chip set driver bug. Once I update to Windows7 SP1(Just relaesed couple weeks ago), the problem disappeared.

 

Thanks,

 

Adam

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