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Zero Defect Mindset

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Blog by John Latimer

Guest Author

 

Zero Defect Mindset

 

At Xilinx, excursion prevention is treated as more than a “wafer fabrication issue.” It begins with design. Xilinx quality is driven by the next wave of innovations through efforts such as design for test (DFT), design for reliability (DFR), design for manufacturing (DFM), mitigations for single-event upset (SEU), and the consistency provided by a scalable optimized architecture. This drive has resulted in a “shift to the left” such that risks are reduced by earlier verification.

 

IP Quality

 

FPGA customers are faced with the increasing complexity of systems, time-to-market pressures, and the need to improve their engineering teams’ productivity. The broad, feature-rich, high-quality Xilinx IP portfolio helps designers address these challenges. With the goal of driving up the quality of its silicon and IP, Xilinx initiated the company-wide Xilinx Verification Initiative (XVI) in 2009. XVI introduced a robust, common set of guidelines and best practices aligned with industry-leading development and verification standards. These XVI recommendations became a required Xilinx policy that has been adopted across all teams to ensure consistent, quality-focused IP testing processes and methodologies. The IP quality improvement efforts started with the goal of reducing customer-triggered defect reports by 10%. After two years and an extensive overhaul of IP development and testing infrastructure, Xilinx has achieved a reduction of more than 33% in customer-triggered defect reports relating to Xilinx IP.

 

Quality Integration

 

Predictable integration is resulting in Xilinx NPE/NPI methodology breakthroughs. An example of this is Xilinx achieving “more than Moore’s Law” with its launch of the worlds’ first FPGA based on stacked-silicon interconnect technology. The Virtex-7 2000T FPGA effectively delivers 20 nm logic density, and shatters the industry record for programmable device density by 2X (6.8 billion transistors). The devices have passed all reliability conditions and began shipping in December 2011.

 

Xilinx has also announced the Zynq-7000 Embedded Processing Platform family, representing a new FPGA device class that combines FPGA and ARM in a single chip.

Because of the larger and more complex devices, Xilinx has also been extending board-level reliability methodologies, increasing testing, and expanding its 3D.

 

The 2011 Xilinx Annual Quality Report is Now Available

 

Having high quality products helps customers engineer innovative solutions and accelerate products to market.  This year’s quality report demonstrates how Xilinx delivers these world class results. During 2011, more than in any other year, Xilinx investments have paid off through the delivery of innovative products like the Kintex 325T, Virtex®-7 2000T, and Zynq™-7000 families. By extending quality further, we have been able to more reliably deliver leading technology ahead of our competitors transforming how FPGAs are used across many markets.

Learn more on Xilinx Engineering Quality

 

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