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PLD Blog (Archived)

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PLD Blog (Archived)

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Designers often ask “what is the maximum frequency my design will operate at?”  The maximum frequency, or ‘Fmax,’ really should not be a question--it should be a requirement of the architecture chosen for the design.

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ABSOLUTE QUALITY defines the Xilinx commitment to excellence.

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In safety critical systems,1 nothing is allowed to go unknown or unacknowledged, every possible condition (behavior) must be accounted for, and the hardware and software must deal with every possible behavior.

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Happy New Year!  I hope your holiday break was sufficient, and that you have all avoided the flu that is going around.  I had a great holiday, and have been healthy, so I am not going to complain.  I do have an issue that I need to discuss:  making it look like science

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What if you need to know what time it is, or what frequency you have, or need to provide a precise frequency in your system?  A few months back I obtained a sample of a small assembly (~1” by 1” by 0.25”) that seems to perform magic:  a GPS disciplined Temperature Compensated Crystal Oscillator (GPS-TCXO) from Symmetricom.

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I recently obtained the Zynq-7000 AP SoC ZC702 Evaluation Kit, and set it so that I can boot the ‘busybox’ Linux build (part of the Sobel Filter demonstration software provided on the platform).

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When it comes to safety-critical systems (planes, trains, automobiles), or to safe industrial controls (windmills, factory steam plants), the designer must take a number of facts into account.

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I know there are a lot of students out there who are part of the Xilinx University Program, and I also know that when you write your Masters and PhD Thesis (as well as any technical paper) you need to find and cite the appropriate references. 

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At Xilinx, excursion prevention is treated as more than a “wafer fabrication issue.”

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As I scanned the posts on the forums, I was both surprised and pleased to see so many new users.  It did not matter if they were students, facing their first assignment in their digital logic course, or if they were a seasoned ASIC designer who was now assigned to designing logic for a FPGA device--the more new users, the better it is for Xilinx, as new users eventually translate into new applications, and new sockets to fill.

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Ah yes, that is always a good question.  And like many good questions, there are many good answers, but let us look at one very specific question and answer.

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I have been watching the forums, and answering the questions I know something about as they pop up.  But, I usually find a pattern to the questions, and that then inspires me to provide a blog which addresses the issue.

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I have sad news:  Peter Alfke, after a long fight with cancer, passed away July 15, 2011.

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One of the most mysterious elements of the data sheets is the relationship between the numbers in the data sheet and the speeds files which describe the timings which are built into the software.  Here is a news flash:  “Problem Solved.”

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Often, the best ideas for my blog postings come from what I am seeing and experiencing on the forums, or from the forum participants themselves.

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