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chapman
Xilinx Employee
Xilinx Employee
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Registered: ‎09-05-2007

PicoBlaze FAQ – Can the UART support Parity?

PicoBlaze FAQ – Can the UART support Parity?

 

The PicoBlaze download ZIP file contains optimised UART transmitter and receiver macros with integral 16-byte FIFO buffers. Your design will apply pulses to ‘EN_16_X_BAUD’ at sixteen times to achieve the desired baud rate but all other parameters are fixed to 1-start bit, 8-bit data and 1 stop bit meaning that the standard UART macros called ‘uart_tx’ and ‘uart_rx’ do not support parity.

 

However, you will also find macros called ‘uart9_tx’ and ‘uart9_rx’ together with a description document named ‘UART9_readme.txt’. This document provides the detail concerning these variants to the standard UART macros but is simple terms these macros do support parity. The concept when using the 9-bit UART macros is that the 9th ‘data’ bit can be used to represent odd or even parity. Which it implements is purely down to your design implementation and/or PicoBlaze code. You may elect to use some simple hardware to generate and check parity or you may use the parity represented by the carry flag ’C’ during a TEST instruction to perform the same task. 

The whole reason for using parity is to detect communication errors. However, if errors are to be detected it raises the question of what to do if there is an error? Do you ignore such data or do you ask for it to be sent again? This is something which only you can answer and by providing the 9-bit UART macros it means that everything concerned with parity generation, checking and subsequent actions is purely down to your application and implementation. So before leaping in and adding parity, do consider what you will do if it does detect an error and you may well consider sticking with the standard 8-bit UART. If you are to have a higher level communication protocol to automatically handle errors then I’m sure you will find PicoBlaze the ideal in which to implement your scheme.

 

Regards,

 

Ken Chapman

 

Message Edited by kcmman on 06-18-2008 02:55 AM
Ken Chapman
Principal Engineer, Xilinx UK
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missbirdie
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Registered: ‎06-07-2008

from where can i download this zip file ??
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chapman
Xilinx Employee
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Registered: ‎09-05-2007

www.xilinx.com/picoblaze

 

Ken Chapman
Principal Engineer, Xilinx UK
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sunyata
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Registered: ‎01-19-2009

Another relevant question.

Can UART support 2 stop bits instead of only 1? Could I somehow modify the kc_uart.vhd file so that the end of a transmission is signified by 2 bits?

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chapman
Xilinx Employee
Xilinx Employee
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Registered: ‎09-05-2007

The macros are provided with fixed functionality but you are using and FPGA so you can modify or create virtually anything yourself. If you want to achieve something similar quickly then you will see that internally to the ‘uart_tx’ macro there are two sections; the actual UART transmitter and the FIFO buffer (look also at 8 of the UART manual provided in the ZIP file). In normal operation you would just keep writing characters into the buffer until it was full and then have to stop whilst the relatively slow serial communications eventually made some room in the buffer. If you bring the ‘fifo_data_present’ signal out from the ‘uart_tx’ macro such that PicoBlaze (or other hardware) can observe this instead of the ‘buffer_full’ signal, you can then write one character at a time into the FIFO buffer each time you see that it is empty. That way you can put a gap of any duration between characters.

 

Regards,

 

Ken

 

Ken Chapman
Principal Engineer, Xilinx UK
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