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rukitunc
Newbie
Newbie
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Registered: ‎08-15-2020

AXI DMA SG example by Xilinx SDK

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Dear All, 

I didn't understand the purpose of this function from the example given by Xilinx SDK. 

XAxiDma_BdRingSetCoalesce(TxRingPtr, Coalesce, Delay); 

Although I understand the working principle of AXI DMA in SG mode. I found that function confusing.

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savula
Moderator
Moderator
651 Views
Registered: ‎10-30-2017

Hi @rukitunc ,

Please check below:

All right, let's say I want DMA to transfer 1280 bytes and generate the interrupt. If MAX_PACKET_LEN
is 128, then I would set 10 BD's, that is 10 buffers, and I would set with function
XAxiDma_BdRingSetCoalesce() coalescing count to 10, telling DMA in that way to generate interrupt
after all 10 buffers are filled. In that way, I would know that exactly 1280 bytes are transferred
to memory.

 refer this post: https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/AXI-DMA-in-SG-mode-How-to-determine-number-of-BDs-and-size-of/td-p/724684

Best Regards,
Srikanth
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savula
Moderator
Moderator
652 Views
Registered: ‎10-30-2017

Hi @rukitunc ,

Please check below:

All right, let's say I want DMA to transfer 1280 bytes and generate the interrupt. If MAX_PACKET_LEN
is 128, then I would set 10 BD's, that is 10 buffers, and I would set with function
XAxiDma_BdRingSetCoalesce() coalescing count to 10, telling DMA in that way to generate interrupt
after all 10 buffers are filled. In that way, I would know that exactly 1280 bytes are transferred
to memory.

 refer this post: https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/AXI-DMA-in-SG-mode-How-to-determine-number-of-BDs-and-size-of/td-p/724684

Best Regards,
Srikanth
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.

View solution in original post

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