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Adventurer
Adventurer
168 Views
Registered: ‎04-12-2020

AXI DMA does not stop

Hello everyone, I am working with AXI DMA

i have oberved something strange, when the DMA transfer is complete, The idle bit in status register goes high indicating DMA transfer is complete but the channel does not stop, The halted bit in status register does not assert and control register also shows first bit as 1 meaning channel still running, Is this the normal functionality, please help

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Scholar
Scholar
143 Views
Registered: ‎05-21-2015

@MuzamilFarid,

Which "DMA" are you referring to?  S2MM?  MM2S?  MM2MM?

Can you provide a trace showing us at all what you are referencing?

Dan

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Adventurer
Adventurer
111 Views
Registered: ‎04-12-2020

i am referring to s2mm, as you can see in the trace, after the transfer is complete, status register is showing me idle bit to 1, but when i read the 30h, first bit is still 1

forumscreen.png
30 reg.png
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