I have a AXI DMA in SG mode, and I need to stream my data to DDR3.
In MB program, I set the BD list and data buffer to DDR3. My program can modify the DDR3 memory, the result can be verified in memory browser.
When I started a S2MM transfer, by chipscope the AXI interface of ddr3, I am sure there are memory write transactions to data buffer and BD status register. But in memory browser, the content of ddr3 does not change.