cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Explorer
Explorer
5,514 Views
Registered: ‎06-22-2011

AXI DMA to On-Chip Memory

hi all,

 

I have a AXI DMA in SG mode, and I need to stream my data to DDR3.

In MB program, I set the BD list and data buffer to DDR3. My program can modify the DDR3 memory, the result can be verified in memory browser.

When I started a S2MM transfer, by chipscope the AXI interface of ddr3, I am sure there are memory write transactions to data buffer and BD status register. But in memory browser, the content of ddr3 does not change.

 

Could anybody tell me the reason?

 

best regards

 

Xiang Chao

 

 

0 Kudos
1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
5,504 Views
Registered: ‎08-02-2011

Hi Xiang,

Make sure to disable caching first.
www.xilinx.com
0 Kudos