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srentz
Visitor
Visitor
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Registered: ‎05-30-2018

AXI Datamover Status INTERR (Internal Error)

I am getting an INTERR (Internal Error) after sending a command to the AXI Datamover but before the data is transferred. 

The command is: cmd <= (User) "0000" & (Rsvd Tag) "0000" & (Addr) mem_address & (DDR) '0' & (EOF) '1' & "000000" & (DSA)'1' & (INC)"000" & (BTT)x"00020";

In the following oscilloscope screen capture

Channel 0 – m00_axis_tvalid – Data path

Channel 4 – m00_axis_tlast

Channel 7 – s_axis_tvalid – Command path

Channel 6 – INTERR – Internal Error from status

Any ideas what could be causing this problem? A previous version of this FPGA seemed to work without problems.

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dgisselq
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Scholar
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Registered: ‎05-21-2015

@srentz ,

There's a "known" bug in the data mover core where it can't handle data arriving before being configured.  You might need to gate any data path, therefore, prior to the data mover to keep it from getting data before being configured to keep this from happening.

Alternatively, you could switch to an open source data mover--where you could actually debug what was going on.

Dan

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