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gladiator
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Registered: ‎07-21-2014

AXI Ethernet Zync Example Design available?

Hi, is there an example design available for the AXI Ethernet IP core? I would like to implement a gigabit ethernet interface located in the PL of the Zynq SoC. It should be useable by the petalinux kernel running on the ARM core(s). Regards Andreas
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trenz-al
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Registered: ‎11-09-2013

just

 

1 drag the cores in vivado and run wizards

2 export

3 import HDF into petalinux

4 build, and enjoy just works.. after a some tweaking

 

 

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gladiator
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Registered: ‎07-21-2014

thank you for the quick reply. I have already tried this. During boot of the generated linux kernel via sd card I got the following error message:

...

io scheduler cfq registered (default)
dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-267056
dma-pl330 f8003000.ps7-dma:     DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
xilinx-dma 40400000.axi-dma: Probing xilinx axi dma engine...Successful
...

e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
xilinx_axienet 43c00000.network: TX_CSUM 0
xilinx_axienet 43c00000.network: RX_CSUM 0
xilinx_axienet 43c00000.network: can't request region for resource [mem 0x40400000-0x4040ffff]
...

 

This is the generated device tree for the pl:

  &ps7_axi_interconnect_0 {
    ranges;
    axi_ethernet_0_dma: axi-dma@40400000 {
      axistream-connected = <&axi_ethernet_0_eth_buf>;
      axistream-control-connected = <&axi_ethernet_0_eth_buf>;
      compatible = "xlnx,axi-dma";
      interrupt-parent = <&ps7_scugic_0>;
      interrupts = <0 29 4>, <0 30 4>;
      reg = <0x40400000 0x10000>;
    } ;
    axi_ethernet_0_eth_buf: network@43c00000 {
      axistream-connected = <&axi_ethernet_0_dma>;
      axistream-control-connected = <&axi_ethernet_0_dma>;
      clock-frequency = <50000000>;
      clock-names = "ref_clk";
      clocks = <&clkc 0>;
      compatible = "xlnx,axi-ethernet-1.00.a";
      device_type = "network";
      interrupt-parent = <&ps7_scugic_0>;
      interrupts = <0 32 4>;
      local-mac-address = [00 0a 35 00 00 00];
      reg = <0x43c00000 0x40000>;
      xlnx,avb = <0x0>;
      xlnx,enable-lvds = <0x0>;
      xlnx,mcast-extend = <0x0>;
      xlnx,phy-type = <0x1>;
      xlnx,phyaddr = <0x1>;
      xlnx,rxcsum = <0x0>;
      xlnx,rxmem = <0x1000>;
      xlnx,rxvlan-strp = <0x0>;
      xlnx,rxvlan-tag = <0x0>;
      xlnx,rxvlan-tran = <0x0>;
      xlnx,stats = <0x0>;
      xlnx,temac-addr-width = <0xc>;
      xlnx,txcsum = <0x0>;
      xlnx,txmem = <0x1000>;
      xlnx,txvlan-strp = <0x0>;
      xlnx,txvlan-tag = <0x0>;
      xlnx,txvlan-tran = <0x0>;
      xlnx,type = <0x1>;
      mdio {
        #address-cells = <1>;
        #size-cells = <0>;
      } ;
    } ;
  } ;

So there are some questions:

- is the generated device tree generated correctly? Maybe there is an error in the block design

  (see attachment 'block-design.pdf').

- does somebody else use an AXI ethernet instance in the PL and does it work with petalinux?

  Info: I'am using Vivado v2014.2 and petalinux-v2014.02-final

 

Thanks in advance

Regards

Andreas

block-design.png
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marcheitz
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Registered: ‎06-03-2010

Hi Andreas,

 

I have the same problem.

Did you solved it?

 

Regards

Marc

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trenz-al
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Registered: ‎11-09-2013

this snipped from working design, there are some difference, I have feedback that those changes have solved some issues, so maybe its helpful to compare

 

 

 

axi_dma_3: axi-dma@40400000 {
		axistream-connected = <&axi_ethernet_3>;
		compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a";
		//compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a", 
"xlnx,axi-dma";
		interrupt-parent = <&ps7_scugic_0>;
		interrupts = < 0 30 4 0 31 4 >;
		reg = < 0x40400000 0x10000 >;
		xlnx,dlytmr-resolution = <0x7d>;
		xlnx,enable-multi-channel = <0x0>;
		xlnx,family = "zynq";
		xlnx,generic = <0x0>;
		xlnx,include-mm2s = <0x1>;
		xlnx,include-mm2s-dre = <0x1>;
		xlnx,include-mm2s-sf = <0x1>;
		xlnx,include-s2mm = <0x1>;
		xlnx,include-s2mm-dre = <0x1>;
		xlnx,include-s2mm-sf = <0x1>;
		xlnx,include-sg = <0x1>;
		xlnx,instance = "axi_dma_3";
		xlnx,mm2s-burst-size = <0x100>;
		xlnx,num-mm2s-channels = <0x1>;
		xlnx,num-s2mm-channels = <0x1>;
		xlnx,prmry-is-aclk-async = <0x1>;
		xlnx,s2mm-burst-size = <0x100>;
		xlnx,sg-include-desc-queue = <0x1>;
		xlnx,sg-include-stscntrl-strm = <0x1>;
		xlnx,sg-length-width = <0xe>;
		xlnx,sg-use-stsapp-length = <0x1>;
		dma-channel@40400000 {
			compatible = "xlnx,axi-dma-mm2s-channel";
			interrupts = < 0 30 4 >;
		};
		dma-channel@40400030 {
			compatible = "xlnx,axi-dma-s2mm-hannel";
			interrupts = < 0 31 4 >;
		};
	} ;

 

 

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marcheitz
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Registered: ‎06-03-2010

This can't solve this problem because you desactivate the xilinx DMA driver.

 

//compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a", 
"xlnx,axi-dma";

Here you suppress the compatibility "xlnx, axi-dma" which is the only compatibility name of the xilinx axi DMA driver.
Then the kernel will not probe xilinx DMA driver!
But I think this is necessary to manage DMA transfer between the ARM and Ethernet.

 

No?

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trenz-al
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Registered: ‎11-09-2013

please read it again..

 

the old one was COMMENTED out, but left in the files as documentation "what was there.."

 

there is new line that replaces the commented one, that should do the trick..

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marcheitz
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Registered: ‎06-03-2010

That's exactly what I say.

 

the line below:

compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a";

does not point to any linux driver in the xilinx linux kernel 3.14.

Then there is no driver loaded to manage the DMA IP.

 

With the line:  compatible = "xlnx,axi-dma", you load the driver xilinx_axidma.c

During the boot you can show the driver is probed:

xilinx-dma 40400000.axi-dma: Probing xilinx axi dma engine...Successful

 

Maybe we do do not have to load the xilinx_axidma driver, but why?

Which driver should be loaded in instead?

 

Marc

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marcheitz
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The problem is:

The xilinx_axienet driver try to realocate the adress space of the xilinx_axidma driver.

But this doesn't work:

 

xilinx_axienet 43c00000.network: can't request region for resource [mem 0x40400000-0x4040ffff]

 

Why?

How can we correct the problem?

 

Marc

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trenz-al
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i think the snippet was from 2014.1, it was from working system, so something must got loaded, unfortunatly we are upgrading everything to 2014.2 at the moment, and the PL AXI ethernet testing will be done within the next weeks only, so I have no working dts from 2014.2 at the moment

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marcheitz
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Registered: ‎06-03-2010

Do you have the boot log of your board with a axi_ethernet + axi_dma working?

Could you post it?

 

Marc

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trenz-al
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no. We are about to check our systems with 2014.2, then can also make log and be more precise, but this will be next week. The system where it worked is too valuable to play around to get one console log. We are testing other functions on that board, and ETH has been removed to reduce synthese times, that the reason we cant make the log right now.

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gladiator
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Registered: ‎07-21-2014

Hi Marc,
I didn't solve it until now. But I've got the following findings:
1) The device tree generated by petalinux-v2014.02-final can't work with the
   provided drivers xilinx_axienet_main.c, xilinx_axidma.c, ... (xilinx kernel xlnx-3.14).
   Comment:
   - resource conflict of xilinx_axidma and xilinx_axienet_main: both modules try to access
     the dma controller register space
2) It seems that dma operation is handled in xilinx_axienet_main.c. So maybe the xilinx_axidma.c
   driver is not necessary for dma operation.
   Comment:
   - extract of the xilinx_axienet_main.c header:
     "...
      * TODO:
      *  - Add Axi Fifo support.
->    *  - Factor out Axi DMA code into separate driver.
      *  - Test and fix basic multicast filtering.
      *  - Add support for extended multicast filtering.
      *  - Test basic VLAN support.
      *  - Add support for extended VLAN support."
   - several dma related functions can be find inside the driver
3) Required changes to generated device tree for my hardware design (maybe incomplete)
   - 'compatible = "xlnx,axi-dma";' has to be changed so that xilinx_axidma.c will not trigger
   - after changing this entry (for example to the mentioned 'compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a";')
     the xilinx_axidma will no longer become active and as a result the xilinx_axienet_main succeeds during
     kernel boot
   - in the 'axi_ethernet_0_eth_buf' section of the device tree some phy related changes are required:
     phy-handle = <&phy1>;             // see line 1660 of xilinx_axienet_main.c
     mdio {
       #address-cells = <1>;
       #size-cells = <0>;
       phy1: phy@1 {
       device_type = "ethernet-phy";
         reg = <1>;
       } ;
     } ;
     This is required because xilinx_axienet_main.c assumes a working phy
     device connected to the mdio interface (in GMII mode). Without the 'phy-handle' entry I get an error
     message when I try to initialize eth1. This is because function asaxienet_mdio_wait_until_ready
     returns ETIMEDOUT as a result of the mdio interface was not initialized.
4) Current status
  After initialization of eth1 I get the following message:
  "libphy: 43c00000:01 - Link is Down."
  I found out that the PHY (which is in the 'Ethernet 1000BASE-X PCS/PMA or SGMII v14.2' IP block),
  does not issue any output on the mdio_o port. So maybe there is still an error in my block design
  or the configuration of the 'Ethernet 1000BASE-X PCS/PMA or SGMII v14.2' IP block. So I have to
  perform further investigations.

 

Regards

Andreas

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trenz-al
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Registered: ‎11-09-2013

Hi gladiator

 

 

are you trying SGMII ??

 

I assumed RGMII :( with SGMII there is usually way more issues.. :(

 

i is better to try the no-dma version first to get the sgmii link up, then convert to dma version

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gladiator
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Registered: ‎07-21-2014

Hi trenz-al,
at the moment I have the following components/configuration in my design on ZC706:
- AXI-Ethernet IP core

  - GMII physical interface and MDIO
- 1000BASE-X PCS/PMA IP core

   - 1000BASE-X Standard

   - GMII and MDIO

   - externally connected to SFP cage of ZC706
   - reference clock generation via si5324 on ZC706, initialized in FSBL

- both cores connected via GMII and MDIO

 

Before that I have merged the TEMAC and 1000BASE-X PCS/PMA example designs

and that worked as expected (TEMAC example design using the SFP module ZC706).

 

Regards

Andreas

 

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superduperuser
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Registered: ‎11-05-2014

Would you mind sharing your merged project?

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